Two stage pin diode driver with energy recovery
This disclosure describes systems, methods, and apparatus for a two-stage PIN diode driver. The first stage can charge and discharge the PIN diode via a resonant circuit, for instance via a power supply in series with switches and an inductor or other inductive component, while the second stage, or holding stage includes both a first holding supply for maintaining a forward bias current through the PIN diode and a second holding supply for maintaining a reverse bias voltage over the PIN diode.
1. A method for driving a PIN diode where the driving comprises changing a voltage, V, of a controlled node connected to a PIN diode from a first voltage, V 1 , to a second voltage, V 2 , and from V 2 to V 1 , the method comprising:
changing from V 1 to V 2 , wherein changing from V 1 to V 2 comprises:
disconnecting the controlled node from a first holding power supply by breaking a first connection, connecting the controlled node to a mid-voltage power supply through a first resonant circuit via a second connection, maintaining the second connection until the first resonant circuit causes the current from the mid-voltage power supply to reverse direction, breaking the second connection as soon as the current reverses direction, and connecting the controlled node to a second holding supply via a third connection after the second connection to the mid-voltage supply has been broken; and
changing from V 2 to V 1 , wherein changing from V 2 to V 1 comprises:
disconnecting the controlled node from the second holding power supply by breaking the third connection, connecting the controlled node to the mid-voltage power supply through a second resonant circuit via a fourth connection, maintaining the fourth connection until the second resonant circuit causes the current from the mid-voltage power supply to reverse direction, breaking the fourth connection as soon as the current reverses direction, and connecting the controlled node to the first holding supply via the first connection after the fourth connection to the mid-voltage power supply has been broken.
2. The method of claim 1 , wherein the first and second resonant circuits are the same circuit.
3. The method of claim 1 , wherein the first and second resonant circuits have at least one component that is not common between them.
4. The method of claim 1 , wherein in the changing from V 1 to V 2 the mid-voltage power supply delivers energy, and in the changing from V 2 to V 1 the mid-voltage power supply recovers energy.
5. The method of claim 1 , wherein in the changing from V 2 to V 1 the mid-voltage power supply delivers energy, and in the changing from V 1 to V 2 the mid-voltage power supply recovers energy.
6. The method of claim 1 , wherein energy is recovered to the first or second holding power supply shortly before the current from the mid-voltage power supply reverses direction.
7. The method of claim 6 , wherein a power converter is connected between an output of the first holding supply and a power sink.
8. The method of claim 7 , wherein the power sink is an output of the mid-voltage power supply.
9. The method of claim 6 , wherein a power converter is connected between an output of the second holding supply and a power sink.
10. The method of claim 9 , wherein the power sink is the output of the mid-voltage power supply.
11. The method of claim 1 , wherein the controlled node is connected to the PIN diode through a radio frequency (RF) blocking circuit that provides a low impedance to direct current (DC) current and attenuates transmission of RF power through the RF blocking device.
12. The method of claim 11 , further comprising, after disconnecting the controlled node from the first holding power supply and before connecting the controlled node to the mid-voltage power supply through the first resonant circuit, connecting one or more low voltage reverse bias supplies to the controlled node in a sequence of increasing voltage when changing from V 1 to V 2 .
13. The method of claim 12 , wherein each of the low voltage supplies disconnect from the controlled node if current drawn from a respective low-voltage power supply reverses direction.
14. The method of claim 12 , wherein one of the one or more low voltage reverse bias supplies is at least partially coupled between the first holding supply and the controlled node.
15. The method of claim 11 , wherein the RF blocking circuit connects the controlled node to a cathode of the PIN diode, the output of the first holding supply is a negative current when the first holding supply is connected to the controlled node and a negative voltage when the first holding supply is not connected to the controlled node.
16. The method of claim 15 , wherein an output of the mid-voltage power supply is a positive voltage, but less positive than an output of the second holding supply.
17. The method of claim 11 , wherein the RF blocking circuit connects the controlled node to an anode of the PIN diode, the output of the first holding supply is a positive current when the first holding supply is connected to the controlled node and a positive voltage when the first holding supply is not connected to the controlled node.
18. The method of claim 17 , wherein an output of the mid-voltage power supply is a negative voltage, but less negative than an output of the second holding supply.
19. The method of claim 11 , wherein a magnitude of current provided by the first holding supply is increased for a short time after connecting the controlled node to the first holding supply.
20. The method of claim 19 , wherein the short time is between 1 microsecond and 100 microseconds, and the magnitude of the current is increased to a level between 2 and 100 times the magnitude of the current after the short time has elapsed.
21. A method for driving a PIN diode, the method comprising:
controllably charging and discharging the PIN diode to place the PIN diode in an OFF state and an ON state, respectively;
recovering stored energy when the PIN diode is discharged; and
holding a voltage across a series combination of the PIN diode and a RF blocking device with a holding supply when the PIN diode turns to the OFF state, where the RF blocking device primarily passes DC current and primarily attenuates RF power.
22. The method of claim 21 , further comprising:
increasing forward current through the PIN diode above a baseline forward current for a short time after discharging the PIN diode.
23. The method of claim 21 , further comprising providing one or more low voltage reverse bias supplies for charging the PIN diode from a voltage substantially lower than that of the holding supply.
24. The method of claim 21 , further comprising charging and discharging the PIN diode with a single mid-voltage power supply.
25. The method of claim 24 , further comprising:
recovering energy to the holding supply.
26. The method of claim 25 , further comprising transferring power from the holding supply to the mid-voltage supply via a power converter.
27. The method of claim 21 wherein a capacitor is operably coupled with the PIN diode as part of a match network, the PIN diode connecting the capacitor in the match network when discharged and disconnecting the capacitor from the match network when charged, the energy recovered further including energy stored in the capacitor.
28. An apparatus comprising:
charge-discharge circuitry configured to charge and discharge a PIN diode to place the PIN diode in an OFF state and an ON state, respectively;
an energy recovery component configured to recover stored energy when the PIN diode is discharged; and
a holding stage incorporating a holding supply configured to hold a voltage across a series combination of the PIN diode and a RF blocking device when the PIN diode is in the OFF state, where the RF blocking device primarily passes DC current and primarily attenuates RF power.
29. The apparatus of claim 28 , further comprising:
current boost circuitry coupled to the charge-discharge circuitry and configured to temporarily increase current through the PIN diode when transitioning to the ON state.
30. The apparatus of claim 28 , further comprising a mid-voltage power supply coupled to the charge-discharge circuitry and configured to provide current to the PIN diode through the charge-discharge circuitry and the RF blocking device.
31. The apparatus of claim 30 , further comprising:
recovering energy to the holding supply.
32. The apparatus of claim 31 , further comprising a power converter coupled between the holding supply and the mid-voltage supply to transfer power from the holding supply to the mid-voltage supply using the energy recovered to the holding supply.
33. The apparatus of claim 28 , further comprising one or more low voltage reverse bias supplies for charging the PIN diode from a voltage substantially lower than that of the holding supply.
34. The apparatus of claim 28 , further comprising a capacitor operably coupled with the PIN diode as part of a match network, the PIN diode connecting the capacitor in the match network when discharged and disconnecting the capacitor from the match network when charged, the energy recovered further including energy stored in the capacitor.
35. The apparatus of claim 28 , the holding stage further comprising a second holding supply configured to conduct current through the PIN diode and a RF blocking device when the PIN diode turns to the on state.
36. A non-transitory, tangible processor-readable storage medium, encoded with processor readable instructions to perform a method for driving a PIN diode, the method comprising:
charging and discharging a PIN diode to place the PIN diode in an OFF state and an ON state, respectively;
recovering stored energy when the PIN diode is discharged; and
holding a voltage across a series combination of the PIN diode and a RF blocking device when the PIN diode is in the OFF state, where the RF blocking device primarily passes DC current and primarily attenuates RF power.
37. The non-transitory, tangible processor-readable storage medium of claim 36 , wherein the method further comprises, during the ON state of the PIN diode, providing a first current to the PIN diode via a resonant circuit to transition the PIN diode to the OFF state, and then holding the voltage across the PIN diode to maintain a reverse bias voltage on the PIN diode.
38. The non-transitory, tangible processor-readable storage medium of claim 36 , wherein the method further comprises holding the voltage across the series combination of the PIN diode and the RF blocking device using a higher voltage supply than a one performing the charging and discharging of the PIN diode.
39. The non-transitory, tangible processor-readable storage medium of claim 36 , wherein the method further comprises recovering the stored energy through a holding supply configured to perform the holding the voltage across the series combination of the PIN diode and the RF blocking device.
40. The non-transitory, tangible processor-readable storage medium of claim 36 , wherein the method further comprises boosting current after discharging the PIN diode.
41. The non-transitory, tangible processor-readable storage medium of claim 40 , wherein the method further comprises, during the OFF state of the PIN diode, drawing a second current from the PIN diode via the resonant circuit to transition the PIN diode to the ON state, and then holding the second current from the PIN diode to maintain a forward bias on the PIN diode.