IP Library › Granted Patent US 12,356,811
Granted Patent B2
US 12,356,811 · App. 17/428,413 · Granted Jul 8, 2025

Display device and electronic device with heat absorption layer coupled to pad electrode layer

Inventor: Kiwamu Miura (Kanagawa, JP)
Assignee: Sony Semiconductor Solutions Corporation
H10K59/131H10K50/87H10K59/121H10K59/8794
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Quick Facts
Patent No.
US 12,356,811
App. No.
17/428,413
Granted
Jul 8, 2025
Kind
B2
Abstract

Display devices and electronic devices are disclosed. In one example, a display device includes a pixel array portion in which pixels each including a light emitting portion are arranged; a pad electrode layer provided outside the pixel array portion on a substrate on which a light emitting portion is formed; and a heat absorption layer thermally coupled to the pad electrode layer.

Claims (16)

1. A display device comprising:

a pixel array portion in which pixels each including a light emitting portion are arranged in rows and columns in a plan view;

a pad electrode layer on which another light emitting portion is formed, the pad electrode layer being arranged on a substrate outside the pixel array portion in the plan view; and

a heat absorption layer thermally coupled to the pad electrode layer, wherein

the heat absorption layer is configured to increase a heat capacity of the pad electrode layer,

the heat absorption layer includes a wiring layer formed as a layer below the pad electrode layer, and

the heat absorption layer is provided over an entirety of each of pads of the pad electrode layer in a length direction.

2. The display device according to claim 1 , wherein a circuit wiring layer is provided below the heat absorption layer.

3. An electronic device comprising a display device that includes:

a pixel array portion in which pixels each including a light emitting portion are arranged in rows and columns in a plan view;

a pad electrode layer on which another light emitting portion is formed, the pad electrode layer being arranged on a substrate outside the pixel array portion in the plan view; and

a heat absorption layer thermally coupled to the pad electrode layer, wherein

the heat absorption layer is configured to increase a heat capacity of the pad electrode layer,

the heat absorption layer includes a wiring layer formed as a layer below the pad electrode layer, and

the heat absorption layer is provided over an entirety of each of pads of the pad electrode layer in a length direction.

4. The electronic device according to claim 3 , wherein a circuit wiring layer is provided below the heat absorption layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2021
From: MIURA, KIWAMU
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 057079/0086 →
Priority Claims (1)
JP 2019-044656 · Mar 12, 2019 · national
Continuity (1)
Related Publication 20220130914A1 · Apr 28, 2022
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