IP Library Granted Patent US 12,360,150
Granted Patent B2
US 12,360,150 · App. 17/867,689 · Granted Jul 15, 2025

Testing method and manufacturing method

Inventors: Atsushi Shoji (Matsumoto, JP); Akira Nishimura (Suzuka, JP)
Assignee: FUJI ELECTRIC CO., LTD.
G01R31/2608
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Quick Facts
Patent No.
US 12,360,150
App. No.
17/867,689
Granted
Jul 15, 2025
Kind
B2
Abstract

Provided is a testing method for testing a semiconductor device provided with a main element portion including a main transistor portion and a main diode portion, and a sensing transistor portion for current detection, the testing method having: operating an element by causing a diode operation of the sensing transistor portion in the semiconductor device in a chip or wafer state; measuring the element by measuring a voltage-current characteristic showing a relationship between a voltage between main terminals of the sensing transistor portion and a current flowing through the main terminals during the diode operation; and determining the element by determining a defectiveness of the semiconductor device based on the voltage-current characteristic.

Claims (48)

1. A testing method for testing a semiconductor device, the testing method comprising:

providing the semiconductor device, which includes a main element portion that includes a main transistor portion and a main diode portion, and a sensing transistor portion, the sensing transistor portion being capable of being selectively placed in an ON state and an OFF state, the semiconductor device further including a semiconductor substrate having an upper surface and a lower surface, wherein a transistor portion lower region of the semiconductor substrate covering a corresponding area in plan view comprising an area corresponding in plan view to the main transistor portion in its entirety and an area corresponding in plan view to the sensing transistor portion in its entirety, and which is in contact with the lower surface, is only of a first conductivity type;

operating the semiconductor device such that the sensing transistor portion is in the OFF state, wherein the semiconductor device includes a sensing electrode and a collector electrode, wherein the sensing transistor portion is provided with main terminals, and wherein the sensing electrode and the collector electrode provide for the main terminals of the sensing transistor portion;

measuring a voltage-current characteristic between the main terminals of the sensing transistor portion in the OFF state by measuring a current I 1 flowing through the main terminals of the sensing transistor portion for each of one or more values of a voltage Vsc between the main terminals of the sensing transistor portion; and

determining whether or not a defect is present in the semiconductor device based on the voltage-current characteristic.

2. The testing method according to claim 1 , wherein the main element portion is provided with main terminals, and wherein in the measuring the voltage-current characteristic, the voltage-current characteristic is measured in a state where at least one of the main terminals of the main element portion is opened.

3. The testing method according to claim 2 , wherein in the operating the semiconductor device, a first test current, which is smaller than a rated current of the main element portion, flows through the sensing transistor portion.

4. The testing method according to claim 2 , wherein

in the determining whether or not a defect is present, the voltage-current characteristic is compared to a reference characteristic to determine whether or not the semiconductor device is defective;

in the determining whether or not a defect is present, at least one of the voltage-current characteristic or the reference characteristic is compensated based on a structure of the semiconductor device.

5. The testing method according to claim 2 , wherein in the operating the semiconductor device, the voltage applied between the main terminals of the sensing transistor portion is set to be from 4V to 6V.

6. The testing method according to claim 1 , wherein in the operating the semiconductor device, a first test current, which is smaller than a rated current of the main element portion, is caused to flow through the sensing transistor portion.

7. The testing method according to claim 6 , wherein

in the determining whether or not a defect is present, the voltage-current characteristic is compared to a reference characteristic to determine whether or not the semiconductor device is defective;

in the determining whether or not a defect is present, at least one of the voltage-current characteristic or the reference characteristic is compensated based on a structure of the semiconductor device.

8. The testing method according to claim 6 , further comprising:

acquiring a module characteristic by acquiring a drop voltage in a resistance for current measurement when a current flows through the main element portion in a state where the resistance for current measurement is connected between a main terminal of the main element portion and a main terminal of the sensing transistor portion in a semiconductor module having the semiconductor device embedded therein; and

acquiring a correlation between the drop voltage and the voltage-current characteristic,

wherein in the determining whether or not a defect is present, the voltage-current characteristic is compared to a reference characteristic determined according to the correlation to determine whether or not the semiconductor device is defective.

9. A testing method for testing a semiconductor device, the semiconductor device including a main element portion that includes a main transistor portion and a main diode portion, and a sensing transistor portion, the semiconductor device having been determined to be non-defective in accordance with the testing method of claim 6 and the semiconductor device being embedded in a semiconductor module, the testing method comprising:

measuring a drop voltage in a resistance for current measurement when a second test current flows through the main element portion in a state where the resistance for current measurement is connected between a main terminal of the main element portion and a main terminal of the sensing transistor portion; and

determining whether or not the semiconductor module is defective based on the drop voltage by comparing the drop voltage to a reference characteristic.

10. The testing method according to claim 6 , wherein in the operating the semiconductor device, the voltage applied between the main terminals of the sensing transistor portion is set to be from 4V to 6V.

11. The testing method according to claim 1 , wherein

in the determining whether or not a defect is present, the voltage-current characteristic is compared to a reference characteristic to determine whether or not the semiconductor device is defective;

in the determining whether or not a defect is present, at least one of the voltage-current characteristic or the reference characteristic is compensated based on a structure of the semiconductor device.

12. A testing method for testing a semiconductor device, the semiconductor device including a main element portion that includes a main transistor portion and a main diode portion, and a sensing transistor portion, the semiconductor device having been determined to be non-defective in accordance with the testing method of claim 11 and the semiconductor device being embedded in a semiconductor module, the testing method comprising:

measuring a drop voltage in a resistance for current measurement when a test current flows through the main element portion in a state where the resistance for current measurement is connected between a main terminal of the main element portion and a main terminal of the sensing transistor portion; and

determining whether or not the semiconductor module is defective based on the drop voltage by comparing the drop voltage to the reference characteristic.

13. The testing method according to claim 11 , wherein in the operating the semiconductor device, the voltage applied between the main terminals of the sensing transistor portion is set to be from 4V to 6V.

14. The testing method according to claim 1 , further comprising:

acquiring a module characteristic by acquiring a drop voltage in a resistance for current measurement when a current flows through the main element portion in a state where the resistance for current measurement is connected between a main terminal of the main element portion and a main terminal of the sensing transistor portion in a semiconductor module having the semiconductor device embedded therein; and

acquiring a correlation between the drop voltage and the voltage-current characteristic,

wherein in the determining whether or not a defect is present, the voltage-current characteristic is compared to a reference characteristic determined according to the correlation to determine whether or not the semiconductor device is defective.

15. A testing method for testing a semiconductor device, the semiconductor device including a main element portion that includes a main transistor portion and a main diode portion, and a sensing transistor portion, the semiconductor device having been determined to be non-defective in accordance with the testing method of claim 14 and the semiconductor device being embedded in a semiconductor module, the testing method comprising:

measuring a drop voltage in a resistance for current measurement when a test current flows through the main element portion in a state where the resistance for current measurement is connected between a main terminal of the main element portion and a main terminal of the sensing transistor portion; and

determining whether or not the semiconductor module is defective based on the drop voltage by comparing the drop voltage to a reference characteristic.

16. A testing method for testing a semiconductor device, the semiconductor device including a main element portion that includes a main transistor portion and a main diode portion, and a sensing transistor portion, the semiconductor device having been determined to be non-defective in accordance with the testing method of claim 1 and the semiconductor device being embedded in a semiconductor module, the testing method comprising:

measuring a drop voltage in a resistance for current measurement when a test current flows through the main element portion in a state where the resistance for current measurement is connected between a main terminal of the main element portion and a main terminal of the sensing transistor portion; and

determining whether or not the semiconductor module is defective based on the drop voltage by comparing the drop voltage to a reference characteristic.

17. The testing method according to claim 1 , wherein in the operating the semiconductor device, the voltage applied between the main terminals of the sensing transistor portion is set to be from 4V to 6V.

18. A manufacturing method for manufacturing a semiconductor module having embedded a semiconductor device therein, the manufacturing method comprising:

testing the semiconductor device by the testing method according to claim 1 ; and

manufacturing the semiconductor module using the semiconductor device determined to be non-defective in the testing the semiconductor device.

19. The testing method according to claim 1 , wherein in determining whether or not a defect is present, I 1 is determined for a corresponding value for Vsc that is given by a predetermined testing voltage Vt and a defect is determined to be present in the semiconductor device when I 1 at Vt exceeds a predetermined threshold current It, in order to screen out the semiconductor device from being used in further manufacturing steps when a defect is determined to be present in the semiconductor device.

20. The testing method according to claim 1 , wherein the semiconductor device is in a chip or wafer state.

21. The testing method according to claim 1 , wherein the main diode portion is provided in the semiconductor substrate, wherein in the main diode portion, a cathode region of a second conductivity type is provided in contact with the lower surface and a collector region of the first conductivity type is not provided, and

the sensing transistor portion and the main diode portion are arranged such that the sensing transistor portion and the main diode portion are intervened by the main transistor portion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 19, 2022
From: SHOJI, ATSUSHI; NISHIMURA, AKIRA
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 060540/0351 →
Priority Claims (1)
JP 2021-142337 · Sep 1, 2021 · national
Continuity (1)
Related Publication 20230069188A1 · Mar 2, 2023
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