Method of forming semiconductor device structure with gate structure
View Patent ↗Structures and formation methods of a semiconductor device structure are provided. The method includes forming a first gate structure over a substrate, and the first gate structure includes a first metal electrode. The method includes forming a second gate structure adjacent to the first gate structure, and the second gate structure includes a second metal electrode. The method also includes forming a mask structure covering the first gate structure and exposing the second gate structure, and etching a portion of the second metal electrode of the second gate structure to form an extending conductive portion. The method includes forming a metal layer over the first gate structure and the extending conductive portion, and etching the metal layer, such that no metal layer is remaining over the first gate structure, and a remaining portion of the metal layer is over the extending conductive portion.
1. A method for forming a semiconductor device structure, comprising:
forming a first gate structure over a substrate, wherein the first gate structure comprises a first metal electrode;
forming a second gate structure adjacent to the first gate structure, wherein the second gate structure comprises a second metal electrode;
forming a mask structure covering the first gate structure and exposing the second gate structure;
etching a portion of the second metal electrode of the second gate structure to form an extending conductive portion;
forming a metal layer over the first gate structure and the extending conductive portion; and
etching the metal layer, such that no metal layer is remaining over the first gate structure, and a remaining portion of the metal layer is over the extending conductive portion.
2. The method as claimed in claim 1 , further comprising:
forming a dielectric layer over the first gate structure, wherein the dielectric layer is in direct contact with a top surface and a sidewall surface of the first gate structure.
3. The method as claimed in claim 2 , further comprising:
forming a S/D structure adjacent to the first gate structure, wherein a sidewall surface of the S/D structure is aligned with a sidewall surface of the dielectric layer.
4. The method as claimed in claim 1 , further comprising:
forming a second gate spacer on a sidewall of the second gate structure, wherein a top surface of the remaining portion of the metal layer is lower than a top surface of the second gate spacer.
5. The method as claimed in claim 4 , wherein the remaining portion of the metal layer is in direct contact with the second gate spacer.
6. The method as claimed in claim 1 , wherein the first gate structure further comprises a first gate dielectric layer, and a portion of the first gate dielectric layer is removed while etching the metal layer.
7. The method as claimed in claim 1 , further comprising:
etching the metal layer simultaneously etching the first metal electrode, wherein a height of the first metal electrode is higher than a height of the remaining portion of the metal layer.
8. The method as claimed in claim 1 , wherein the remaining portion of the metal layer and the extending conductive portion form a T-shaped structure.
9. A method for forming a semiconductor device structure, comprising:
forming a first dielectric layer over a substrate, wherein the first dielectric layer has a first trench with a first width and a second trench with a second width that is less than the first width;
forming a first gate structure in the first trench, wherein the first gate structure comprises a first work function layer and a first metal electrode;
forming a second gate structure in the second trench, wherein the second gate structure comprises a second work function layer and a second metal electrode;
forming a mask structure [covering the first gate structure and exposing the second gate structure;
etching the second work function layer and second metal electrode of the second gate structure, wherein a top surface of the second metal electrode is higher than a top surface of the second work function layer;
removing the mask structure;
depositing a metal layer over the first gate structure, the second gate structure, the first dielectric layer, wherein the metal layer fills the second trench and covers the second metal electrode; and
etching the metal layer and etching the first work function layer and the first metal electrode, wherein a top surface of the first metal electrode is higher than a top surface of the first work function layer.
10. The method as claimed in claim 9 , wherein a remaining metal layer covers the second metal electrode, and a top portion of the second metal electrode is embedded in the remaining metal layer.
11. The method as claimed in claim 9 , further comprising:
forming a dielectric layer on the first work function layer, wherein the dielectric layer has a sidewall surface in direct contact with the first metal electrode and a bottom surface in direct contact with the first work function layer.
12. The method as claimed in claim 11 , wherein a top surface of the dielectric layer is substantially level with a top surface of the first metal electrode.
13. The method as claimed in claim 9 , further comprising:
forming a dielectric layer on a remaining metal layer on the second metal electrode, wherein the dielectric layer is not in direct contact with the second work function layer.
14. The method as claimed in claim 9 , wherein the metal layer and the second metal electrode form a T-shaped structure.
15. The method as claimed in claim 9 , further comprising:
forming two second spacers adjacent to the second gate structure, wherein the second metal electrode is separated from the second spacers by the metal layer.
16. A method for forming a semiconductor device structure, comprising:
forming a first gate structure over a substrate, wherein the first gate structure comprises a first metal electrode;
forming a second gate structure adjacent to the first gate structure, wherein the second gate structure comprises a second metal electrode;
forming a spacer on a sidewall surface of the second gate structure;
forming a mask structure covering the first gate structure and exposing the second gate structure;
etching a portion of the second metal electrode of the second gate structure to form a recess, wherein the spacer is exposed by the recess;
forming a metal layer in the recess and over the first gate structure; and
removing a portion of the metal layer, wherein a remaining portion of the metal layer is on the second metal electrode to form a T-shaped structure.
17. The method as claimed in claim 16 , further comprising:
removing a portion of the first metal electrode when removing the portion of the metal layer, wherein a top surface of the first metal electrode is higher than a top surface of the T-shaped structure.
18. The method as claimed in claim 16 , further comprising:
forming two dielectric layers on sidewall surfaces of the first metal electrode, wherein top surfaces of the two dielectric layers are substantially leveled with a top surface of the first metal electrode.
19. The method as claimed in claim 16 , wherein the second gate structure has a second width, the first gate structure has a first width, and the first width is greater than the second width.
20. The method as claimed in claim 16 , further comprising:
forming two second spacers adjacent to the second gate structure, wherein the second metal electrode is separated from the second spacers by the metal layer.