Access tracking in memory
An access tracker configured to receive a request to access a page, determine whether a page identification (ID) associated with the page is in the access tracker, increment an access count of the page in response to determining the page ID is in the access tracker, sort a number of page IDs based on an access count of each page ID, and determine whether a different page is hot or cold in response to sorting the number of page IDs.
1. An apparatus, comprising:
a first access tracker;
a second access tracker; and
a processor configured to:
determine an access count of a page ID with a lowest access count in the first access tracker;
erase a page associated with the lowest access count;
transmit the access count of the page ID with the lowest access count to the second access tracker in response to determining the page ID has the lowest access count; and
perform a hash function on the page ID with the lowest access count.
2. The apparatus of claim 1 , wherein the processor is configured to remove the access count of the page ID with the lowest access count from the first access tracker.
3. The apparatus of claim 1 , wherein the processor is configured to sort a number of page IDs in the first access tracker based on access counts to determine the access count of the page ID with the lowest access count in the first access tracker.
4. The apparatus of claim 1 , comprising a memory sub-system controller comprising the first access tracker and the second access tracker.
5. The apparatus of claim 4 , comprising a first memory device coupled to the memory sub-system controller.
6. The apparatus of claim 5 , comprising a second memory device coupled to the memory sub-system controller.
7. The apparatus of claim 6 , wherein the processor is configured to store the page associated with the lowest access count in the second memory device.
8. An apparatus, comprising:
a first access tracker;
a second access tracker; and
a processor configured to:
receive a first access count at the first access tracker;
remove a second access count of a page ID with a lowest access count in the first access tracker in response to the first access tracker being full;
erase a page associated with the lowest access count;
transmit the second access count of the page ID with the lowest access count to the second access tracker in response to the first access tracker being full; and
perform a hash function on the page ID with the lowest access count.
9. The apparatus of claim 8 , wherein the processor is configured to replace the second access count of the page ID with the lowest access count with the first access count in the first access tracker.
10. The apparatus of claim 8 , wherein the first access count is received at the first access tracker in response to receiving a request to access a page.
11. The apparatus of claim 10 , wherein the first access count is transmitted from the second access tracker.
12. The apparatus of claim 8 , wherein the processor is configured to increment the first access count.
13. The apparatus of claim 8 , wherein the processor is configured to enter the second access count of the page ID with the lowest access count into the second access tracker.
14. A system, comprising:
a host; and
a memory sub-system comprising a controller, wherein the controller is configured to receive commands from the host, and wherein the controller comprises:
a first access tracker;
a second access tracker; and
a processor configured to:
remove an access count of a page ID with a lowest access count in the first access tracker in response to the first access tracker being full;
erase a page associated with the lowest access count;
transmit the access count of the page ID with the lowest access count to the second access tracker in response to the first access tracker being full; and
perform a hash function on the page ID with the lowest access count.
15. The system of claim 14 , wherein the second access tracker is configured to receive the access count of the page ID with the lowest access count.
16. The system of claim 14 , wherein the processor is configured to store the access count of the page ID with the lowest access count in an array of counters.
17. The system of claim 14 , wherein the memory sub-system further comprises:
a first memory device configured to erase a page associated with the lowest access count; and
a second memory device configured to store the page associated with the lowest access count.