Semiconductor device and method of manufacturing semiconductor device
In one example, a semiconductor structure comprises a frontside substrate comprising a conductive structure, a backside substrate comprising a base substrate and a cavity substrate contacting the base substrate, wherein the backside substrate is over a top side of the frontside substrate and has a cavity and an internal interconnect contacting the frontside substrate, and a first electronic component over the top side of the frontside substrate and in the cavity. The first electronic component is coupled with the conductive structure, and an encapsulant is in the cavity and on the top side of the frontside substrate, contacting a lateral side of the first electronic component, a lateral side of the cavity, and a lateral side of the internal interconnect. Other examples and related methods are also disclosed herein.
1. A semiconductor structure, comprising:
a frontside substrate comprising a conductive structure;
a backside substrate comprising a base substrate and a cavity substrate adjacent to the base substrate, wherein the backside substrate is over a top side of the frontside substrate and has a cavity and an internal interconnect contacting the frontside substrate;
a first electronic component over the top side of the frontside substrate and in the cavity, wherein the first electronic component is coupled with the conductive structure;
an encapsulant in the cavity and on the top side of the frontside substrate, contacting a lateral side of the first electronic component, a lateral side of the cavity, and a lateral side of the internal interconnect; and
an interface layer between a top side of the first electronic component and the backside substrate, wherein the interface layer is discrete from the encapsulant.
2. The semiconductor structure of claim 1 , wherein the backside substrate comprises a monolithic structure comprising the base substrate and the cavity substrate.
3. The semiconductor structure of claim 1 , comprising a second electronic component in the cavity and adjacent to the first electronic component.
4. The semiconductor structure of claim 1 , wherein a lateral side of the backside substrate is free of the encapsulant.
5. The semiconductor structure of claim 1 , wherein the encapsulant contacts an external lateral side of the backside substrate.
6. The semiconductor structure of claim 1 , wherein the conductive structure of the frontside substrate is coupled with the internal interconnect of the backside substrate.
7. The semiconductor structure of claim 1 , wherein the interface layer comprises an electrically conductive material.
8. The semiconductor structure of claim 1 , wherein the frontside substrate comprises a redistribution layer (RDL) substrate.
9. The semiconductor structure of claim 1 , wherein the frontside substrate comprises a redistribution layer substrate, and the backside substrate comprises a pre-formed substrate.
10. The semiconductor structure of claim 1 , wherein a width of the frontside substrate is greater than a width of the backside substrate.
11. A method to manufacture a semiconductor structure, comprising:
providing a backside substrate having a cavity and an internal interconnect, wherein the backside substrate comprises a base substrate and a cavity substrate contacting the base substrate;
placing an electronic component having a component terminal in the cavity of the backside substrate, wherein an interface material is between the electronic component and the backside substrate;
providing an encapsulant in the cavity on a top side of the backside substrate and contacting a lateral side of the electronic component, the internal interconnect, and the component terminal, wherein the encapsulant is discrete from the interface material; and
providing a frontside substrate over the top side of the backside substrate, wherein the frontside substrate has a conductive structure coupled with the internal interconnect.
12. The method of claim 11 , comprising grinding the encapsulant and a portion of the internal interconnect before providing the frontside substrate.
13. The method of claim 11 , wherein the conductive structure comprises an inward terminal, and the internal interconnect is formed on the inward terminal via a plating process.
14. The method of claim 11 , wherein providing the frontside substrate comprises:
forming a dielectric layer of the frontside substrate over the encapsulant, the backside substrate, and the electronic component; and
forming a conductive layer of the frontside substrate over the dielectric layer and coupled to the backside substrate and the electronic component though the dielectric layer.
15. A semiconductor structure, comprising:
a first semiconductor device comprising:
a frontside substrate comprising a conductive structure;
a backside substrate comprising a base substrate and a cavity substrate adjacent to the base substrate, wherein the backside substrate is over a top side of the frontside substrate and has a cavity and an internal interconnect contacting the frontside substrate;
a first electronic component over the top side of the frontside substrate and in the cavity, wherein the first electronic component is coupled with the conductive structure via a component terminal;
an encapsulant in the cavity and on the top side of the frontside substrate bounding a lateral side of the first electronic component and the internal interconnect;
an interface layer between a top side of the first electronic component and the backside substrate, wherein the interface layer is discrete from the encapsulant; and
a second semiconductor device over a top side of the first semiconductor device, wherein the second semiconductor device is coupled with a substrate land on a top side of the backside substrate.
16. The semiconductor structure of claim 15 , wherein the backside substrate comprises a monolithic structure comprising the base substrate and the cavity substrate.
17. The semiconductor structure of claim 15 , comprising a second electronic component in the cavity and adjacent to the first electronic component.
18. The semiconductor structure of claim 15 , wherein a lateral side of the backside substrate is free of the encapsulant.
19. The semiconductor structure of claim 15 , wherein the encapsulant contacts an external lateral side of the backside substrate.
20. The semiconductor structure of claim 15 , wherein the interface layer comprises an electrically conductive material.