IP Library › Granted Patent US 12,389,637
Granted Patent B2
US 12,389,637 · App. 18/537,954 · Granted Aug 12, 2025

Nonvolatile semiconductor memory device including a memory cell

Inventors: Megumi Ishiduki (Yokkaichi Mie, JP); Hiroshi Nakaki (Yokkaichi Mie, JP); Takamasa Ito (Nagoya Aichi, JP)
Assignee: KIOXIA CORPORATION
H10D30/696H10B43/10H10B43/27H10B43/50H10D30/0413H10D30/693H01L21/76895H01L23/528H10B41/20H10B41/27H10B43/30H10B43/35H10B43/40H10B99/00H10D84/00
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Quick Facts
Patent No.
US 12,389,637
App. No.
18/537,954
Granted
Aug 12, 2025
Kind
B2
Abstract

A semiconductor device includes a base body, a stacked body on the base body and a first columnar part. The base body includes a substrate, a first insulating film on the substrate, a first conductive film on the first insulating film, and a first semiconductor part on the first conductive film. The stacked body includes conductive layers and insulating layers stacked alternately in a stacking direction. The first columnar part is provided inside the stacked body and the first semiconductor part. The first columnar part includes a semiconductor body and a memory film between the semiconductor body and conductive layers. The semiconductor body extends in the stacking direction. The first columnar part has a first diameter and a second diameter in a first direction crossing the stacking direction. The first diameter inside the first semiconductor part is larger than the second diameter inside the stacked body.

Claims (31)

1. A nonvolatile semiconductor memory device comprising:

an underlying insulating layer provided above a substrate;

a source layer provided above the underlying insulating layer, the source layer including a conductive part and a semiconductor part above the conductive part;

a stacked body provided above the source layer, the stacked body including a plurality of first electrode layers and a plurality of first insulating layers interposed between two of the first electrode layers adjacent in a stacking direction respectively; and

a first columnar part piercing through the stacked body in the stacking direction, a lower end portion of the first columnar part being electrically connected to the source layer,

the first columnar part having a first width in a first direction perpendicular to the stacking direction inside the semiconductor part and a second width in the first direction inside a lowermost first insulating layer of the first insulating layers, the first width being larger than the second width.

2. The device according to claim 1 , wherein the semiconductor part includes a first semiconductor layer, a second semiconductor layer on the first semiconductor layer and a third semiconductor layer on the second semiconductor layer, and the first columnar part includes a semiconductor channel layer extending in the stacking direction through the stacked body and contacting the second semiconductor layer.

3. The device according to claim 2 , wherein the first columnar part has the first width in the first direction inside the third semiconductor layer of the semiconductor part.

4. The device according to claim 2 , wherein the first semiconductor layer includes an n-type semiconductor.

5. The device according to claim 1 , wherein the semiconductor part includes silicon.

6. The device according to claim 1 , wherein the conductive part includes tungsten.

7. The device according to claim 1 , wherein the first width is enlarged relative to the second width on both sides in the first direction.

8. The device according to claim 1 , wherein the first columnar part includes a semiconductor channel layer with a tubular configuration extending in the stacking direction and a core layer provided inside the semiconductor channel layer with the tubular configuration.

9. The device according to claim 8 , wherein the first columnar part further includes an insulating film covering a sidewall of the semiconductor channel layer.

10. The device according to claim 1 , wherein the first columnar part has a third width in the first direction inside a lowermost first electrode layer of the first electrode layers, the third width being less than the first width.

11. The device according to claim 10 , wherein the first columnar part forms a source-side select transistor at a crossing portion with the lowermost first electrode layer.

12. The device according to claim 1 , wherein the semiconductor channel layer has a tubular configuration and a core layer is provided inside the semiconductor channel layer having the tubular configuration.

13. The device according to claim 12 , wherein the first columnar part further includes an insulating film covering a sidewall of the semiconductor channel layer.

14. A nonvolatile semiconductor memory device comprising:

an underlying insulating layer provided above a substrate;

a source layer provided above the underlying insulating layer, the source layer including a conductive part and a semiconductor part above the conductive part;

a stacked body provided above the source layer, the stacked body including a plurality of first electrode layers and a plurality of first insulating layers interposed between two of the first electrode layers adjacent in a stacking direction respectively; and

a first columnar part piercing through the stacked body in the stacking direction, the first columnar part including a semiconductor channel layer which extends in the stacking direction through the stacked body and of which a lower end portion is electrically connected to the source layer,

the semiconductor part including a first semiconductor layer, a second semiconductor layer and a third semiconductor layer, the second semiconductor layer contacting the first semiconductor layer and the semiconductor channel layer, the third semiconductor layer contacting the second semiconductor layer, and

the first columnar part having a first width in a first direction perpendicular to the stacking direction inside the third semiconductor layer and a second width in the first direction inside a lowermost first insulating layer of the first insulating layers, the first width being larger than the second width.

15. The device according to claim 14 , wherein the first semiconductor layer includes an n-type semiconductor.

16. The device according to claim 14 , wherein the first semiconductor layer, the second semiconductor layer and the third semiconductor layer include silicon.

17. The device according to claim 14 , wherein the conductive part includes tungsten.

18. The device according to claim 14 , wherein the first width is enlarged relative to the second width on both sides in the first direction.

19. The device according to claim 14 , wherein the first columnar part has a third width in the first direction inside a lowermost first electrode layer of the first electrode layers, the third width being less than the first width.

20. The device according to claim 19 , wherein the first columnar part forms a source-side select transistor at a crossing portion with the lowermost first electrode layer.

Priority Claims (1)
JP 2018-055371 · Mar 22, 2018 · national
Continuity (4)
Continuation 17825542 · May 26, 2022
Continuation 17009373 · Sep 1, 2020
Continuation 16130432 · Sep 13, 2018
Related Publication 20240120395A1 · Apr 11, 2024
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