Method of making semiconductor device including metal insulator metal capacitor
A method of making a semiconductor device includes forming a circuit layer over a substrate. The method further includes depositing an insulator over the substrate. The method further includes patterning the insulator to define a test line trench, a first trench, and a second trench, wherein the first trench is on a portion of the substrate exposed by the circuit layer. The method further includes filling the test line trench to define a test line electrically connected to the circuit layer. The method further includes filling the first trench and the second trench to define a capacitor.
1. A method of making a semiconductor device, the method comprising:
forming a circuit layer over a substrate;
depositing an insulator over the substrate;
patterning the insulator to define a test line trench, a first trench, and a second trench, wherein the first trench exposes a portion of the substrate exposed by the circuit layer;
filling the test line trench to define a test line electrically connected to the circuit layer; and
filling the first trench and the second trench to define a capacitor.
2. The method of claim 1 , wherein filling the test line trench comprises filling the test line trench simultaneously with filling the first trench.
3. The method of claim 1 , further comprising electrically connecting the circuit layer to the capacitor.
4. The method of claim 1 , wherein filling the test line trench comprises defining the test line in direct connection with the circuit layer.
5. A method of making a semiconductor device, the method comprising:
forming a circuit layer over a first portion of a substrate, wherein the circuit layer exposes a second portion of the substrate;
forming a test line electrically connected to the circuit layer; and
forming a capacitor entirely over the second portion of the substrate.
6. The method of claim 5 , wherein forming the test line comprises:
depositing an insulator over the substrate;
patterning the insulator to define a first opening; and
filling the first opening with a first conductive material.
7. The method of claim 6 , wherein forming the capacitor comprises:
patterning the insulator to define a second opening and a third opening; and
filling the second opening and the third opening with a second conductive material.
8. The method of claim 7 , wherein filling the second opening and the third opening is performed simultaneously with filling the first opening.
9. The method of claim 7 , wherein patterning the insulator to define the second opening and the third opening is performed simultaneously with patterning the insulator to define the first opening.
10. The method of claim 7 , wherein forming the capacitor further comprises removing the second conductive material from a top surface of the insulator.
11. The method of claim 7 , wherein forming the capacitor further comprises:
patterning the insulator to define a plurality of fourth openings extending perpendicular to the second opening; and
patterning the insulator to define a plurality of fifth openings extending perpendicular to the third opening.
12. The method of claim 11 , wherein patterning the insulator comprises defining one of the plurality of fifth openings between adjacent fourth openings of the plurality of fourth openings.
13. The method of claim 11 , wherein forming the capacitor further comprises filling the plurality of fourth openings and the plurality of fifth openings with the second conductive material.
14. The method of claim 5 , wherein forming the test line comprises forming the test line having a serpentine shape.
15. A method of making a semiconductor device, the method comprising:
forming a circuit layer over a substrate;
depositing an insulator over the substrate;
patterning the insulator to define a test line trench, a first trench, and a second trench, wherein the test line trench has a first depth, each of the first trench and the second trench have a second depth, and the second depth is greater than the first depth;
filling the test line trench to define a test line electrically connected to the circuit layer; and
filling the first trench and the second trench to define a capacitor.
16. The method of claim 15 , wherein patterning the insulator comprises defining the first trench and the second trench over a portion of the substrate exposed by the circuit layer.
17. The method of claim 15 , wherein patterning the insulator comprises defining the test line trench having a serpentine shape.
18. The method of claim 15 , wherein filling the test line trench and filling the first trench and second trench comprises depositing a conductive material.
19. The method of claim 15 , wherein patterning the insulator comprises:
defining a plurality of third trenches connected to the first trench, wherein each of the plurality of third trenches extends perpendicular to the first trench; and
defining a fourth trench connected to the second trench, wherein the fourth trench extends perpendicular to the second trench.
20. The method of claim 19 , wherein defining the fourth trench comprises defining the fourth trench between adjacent third trenches of the plurality of third trenches.