RFSOI semiconductor structures including a nitrogen-doped charge-trapping layer and methods of manufacturing the same
A semiconductor-on-insulator (SOI) substrate includes a handle substrate, a charge-trapping layer located over the handle substrate and including nitrogen-doped polysilicon, an insulating layer located over the charge-trapping layer, and a semiconductor material layer located over the insulating layer. The nitrogen atoms in the charge-trapping layer suppress grain growth during anneal processes used to form the SOI substrate and during subsequent high temperature processes used to form semiconductor devices on the semiconductor material layer. Reduction in grain growth reduces distortion of the SOI substrate, and facilitates overlay of lithographic patterns during fabrication of the semiconductor devices. The charge-trapping layer suppresses formation of a parasitic surface conduction layer, and reduces capacitive coupling of the semiconductor devices with the handle substrate during high frequency operation such as operations in gigahertz range.
1. A method of forming a semiconductor structure, comprising:
depositing a polysilicon material layer on a top surface of a handle substrate;
converting the polysilicon material layer into a nitrogen-doped polysilicon layer;
thermally oxidizing a top portion of the nitrogen-doped polysilicon layer into a thermal oxide layer;
forming a semiconductor device in a remaining portion of the nitrogen-doped polysilicon layer and the thermal oxide layer; and
attaching a semiconductor material layer on a top surface of the thermal oxide layer and a top surface of the semiconductor device.
2. The method of claim 1 , wherein converting the polysilicon material layer into the nitrogen-doped polysilicon layer comprises implanting nitrogen ions into the polysilicon material layer.
3. The method of claim 2 , wherein a total dose of nitrogen ions implanted into the polysilicon material layer is selected such that the nitrogen-doped polysilicon layer comprises nitrogen atoms at an average atomic concentration in a range of 1.0×10 16 /cm 3 to 1.0×10 20 /cm 3 .
4. The method of claim 2 , wherein the nitrogen ions are implanted into the polysilicon material layer using a plurality of nitrogen implantation processes having different average ion implantation depths.
5. The method of claim 1 , wherein the thermally oxidizing of the top portion of the nitrogen-doped polysilicon layer comprises annealing the remaining portion of the nitrogen-doped polysilicon layer at an elevated temperature in a range from 900 degrees Celsius to 1,100 degrees Celsius for a duration in a range from 10 seconds to 120 minutes.
6. The method of claim 1 , wherein the semiconductor device comprises a radio-frequency circuit configured to operate at a frequency in a range from 1 GHz to 100 GHz.
7. A method of forming a semiconductor structure, comprising:
forming a nitrogen-doped polysilicon layer;
annealing the nitrogen-doped polysilicon layer such that nitrogen in the nitrogen-doped polysilicon layer suppresses an increase in grain size of the nitrogen-doped polysilicon layer;
thermally oxidizing a top portion of the nitrogen-doped polysilicon layer to form a thermal oxide layer;
forming a semiconductor device in a remaining portion of the nitrogen-doped polysilicon layer and the thermal oxide layer; and
attaching a semiconductor layer to a top surface of the thermal oxide layer and a top surface of the semiconductor device.
8. The method of claim 7 , wherein the forming of the nitrogen-doped polysilicon layer comprises forming the nitrogen-doped polysilicon layer to have a substantially uniform concentration of nitrogen atoms.
9. The method of claim 7 , wherein the forming of the nitrogen-doped polysilicon layer comprises implanting nitrogen into a polysilicon layer in a plurality of implantation processes to form the nitrogen-doped polysilicon layer.
10. The method of claim 9 , wherein the implanting of the nitrogen comprises implanting the nitrogen into the polysilicon layer such that a variation of an atomic concentration of nitrogen atoms within the nitrogen-doped polysilicon layer as a function of vertical distance from the handle substrate is within 30% of an average atomic concentration of the nitrogen atoms in the nitrogen-doped polysilicon layer.
11. The method of claim 9 , wherein the implanting of the nitrogen comprises implanting the nitrogen in the plurality of implantation processes at a plurality of target depths, respectively.
12. The method of claim 9 , wherein the implanting of the nitrogen comprises implanting the nitrogen at a plurality of implantation energies in a range from 0.5 MeV to 50 MeV.
13. The method of claim 9 , wherein the implanting of the nitrogen comprises implanting a total dose of the nitrogen such that the nitrogen-doped polysilicon layer comprises an average atomic concentration of nitrogen atoms in a range from 1.0×10 16 /cm3 to 1.0×10 20 /cm 3 .
14. The method of claim 7 , wherein the annealing of the nitrogen-doped polysilicon layer comprises annealing the nitrogen-doped polysilicon layer at a temperature in a range from 600° C. to 1,050° C.
15. The method of claim 7 , wherein the annealing of the nitrogen-doped polysilicon layer comprises annealing the nitrogen-doped polysilicon layer such that an increase in grain size of the nitrogen-doped polysilicon layer caused by the annealing of the nitrogen-doped polysilicon layer is less than 20%.
16. The method of claim 7 , wherein the annealing of the nitrogen-doped polysilicon layer comprises annealing the nitrogen-doped polysilicon layer for a duration in a range from 10 seconds to 120 minutes.
17. The method of claim 7 , wherein the thermally oxidizing of the top portion of the nitrogen-doped polysilicon layer comprises thermally oxidizing the top portion of the nitrogen-doped polysilicon layer at a temperature in a range from 800° C. to 1,100° C.
18. The method of claim 7 , wherein the thermally oxidizing of the top portion of the nitrogen-doped polysilicon layer comprises forming the thermal oxide layer on a remaining portion of the nitrogen-doped polysilicon.
19. The method of claim 7 , further comprising:
before the attaching of the semiconductor layer, thinning the thermal oxide layer to have a thickness in a range from 50 nm to 500 nm.
20. A method of forming a semiconductor structure, comprising:
annealing a nitrogen-doped polysilicon layer such that nitrogen in the nitrogen-doped polysilicon layer suppresses an increase in grain size of the nitrogen-doped polysilicon layer;
thermally oxidizing a top portion of the nitrogen-doped polysilicon layer to form a thermal oxide layer;
forming a semiconductor device in a remaining portion of the nitrogen-doped polysilicon layer and the thermal oxide layer; and
attaching a semiconductor layer to a top surface of the thermal oxide layer and a top surface of the semiconductor device.