Passivation structure for a thin film transistor
View Patent ↗In some embodiments, the present disclosure relates to a device that includes an active layer, a gate electrode, a passivation structure, a source contact, and a drain contact arranged over a substrate. The gate electrode is arranged over the substrate and is spaced apart from the active layer by a gate dielectric layer. The passivation structure is arranged over the active layer. The source contact extends through the passivation structure and contacts the active layer. The drain contact extends through the passivation structure and contacts the active layer. The passivation structure is hydrophobic.
1. A method comprising:
forming an active layer over a substrate;
forming a gate electrode over the substrate, wherein a gate dielectric layer separates the gate electrode form the active layer;
forming a passivation structure over the active layer;
patterning the passivation structure to form a first opening in the passivation structure and a second opening in the passivation structure;
forming a source contact in the first opening and a drain contact in the second opening, wherein the source and drain contacts contact the active layer; and
wherein the passivation structure comprises an upper portion and a lower portion arranged around the source and drain contacts, the upper portion including one or more of oxygen-doped silicon carbide and nitrogen-doped silicon carbide.
2. The method of claim 1 , wherein a topmost surface of the gate electrode physically contacts a bottommost surface of the gate dielectric layer along an interface that continuously and laterally extends past opposing outermost sides of both the first opening and the second opening.
3. The method of claim 1 , wherein the passivation structure has a maximum height that is less than or equal to a maximum height of the source and drain contacts.
4. The method of claim 3 , wherein the passivation structure is formed to have topmost and bottommost surfaces laterally between the source contact and the gate electrode.
5. The method of claim 3 , wherein the upper portion of the passivation structure comprises a mixture of both the oxygen-doped silicon carbide and nitrogen-doped silicon carbide.
6. The method of claim 3 , wherein the passivation structure comprises a flat lower surface that continuously extends between a first sidewall of the passivation structure that forms the first opening and a second sidewall of the passivation structure that forms the second opening.
7. A method, comprising:
forming one or more interconnects within a dielectric layer over a substrate;
forming an active layer over the dielectric layer;
forming a gate electrode over the dielectric layer, wherein a gate dielectric separates the gate electrode from the active layer;
forming a passivation structure over the active layer;
forming a source contact and a drain contact within the passivation structure, wherein the source contact and the drain contact are laterally separated by a part of the passivation structure; and
wherein the passivation structure comprises an upper portion and a lower portion arranged around the source and drain contacts, the upper portion including one or more of oxygen-doped silicon carbide and nitrogen-doped silicon carbide.
8. The method of claim 7 , wherein the lower portion of the passivation structure and the upper portion of the passivation structure laterally surround the source contact and the drain contact.
9. The method of claim 8 , wherein the upper portion of the passivation structure extends from above a bottom of the source contact to a top of the source contact.
10. The method of claim 8 , wherein the source contact and the drain contact vertically extend to a top of the passivation structure.
11. The method of claim 8 , wherein a height of the source contact is substantially equal to a height of the passivation structure.
12. The method of claim 8 , wherein the passivation structure is arranged along sidewalls of the gate electrode and the gate dielectric.
13. The method of claim 12 , wherein the passivation structure laterally separates the gate electrode and the gate dielectric from the source contact and the drain contact.
14. The method of claim 12 , wherein the passivation structure laterally and continuously extends from a sidewall of the gate electrode to a sidewall of the source contact.
15. A method, comprising:
forming an active layer over a substrate;
forming a gate electrode over the substrate, wherein the gate electrode is separated from the active layer by a gate insulator;
forming a passivation structure over the active layer;
forming a source contact and a drain contact over the active layer, wherein the source contact and the drain contact extend from a top surface of the passivation structure to the active layer; and
wherein the passivation structure comprises an upper portion and a lower portion arranged around the source and drain contacts, the upper portion including one or more of oxygen-doped silicon carbide and nitrogen-doped silicon carbide.
16. The method of claim 15 , further comprising:
forming an inter-level dielectric (ILD) layer over the substrate;
forming an interconnect within the ILD layer; and
wherein the gate electrode and the passivation structure are laterally separated from the interconnect by the ILD layer.
17. The method of claim 15 , wherein the active layer comprises indium gallium zinc oxide, indium tin oxide, indium gallium oxide, indium zinc oxide, indium gallium zinc tin oxide, or indium oxide.
18. The method of claim 15 , wherein the passivation structure physically contacts the active layer.
19. The method of claim 15 , wherein the passivation structure physically contacts the active layer along an interface that is vertically below the gate electrode.
20. The method of claim 15 , wherein the upper portion of the passivation structure contacts the lower portion of the passivation structure along an interface that continuously extends between the source contact and the drain contact.