IP Library › Granted Patent US 12,431,422
Granted Patent B2
US 12,431,422 · App. 18/150,567 · Granted Sep 30, 2025

Semiconductor device and method of forming RDL with graphene-coated core

Inventors: YongMoo Shin (Incheon, KR); HyunSeok Park (Gyeonggi-do, KR); KyoWang Koo (Incheon, KR); Sinjae Kim (Incheon, KR)
Assignee: STATS ChipPAC Pte. Ltd.
H01L23/49877H01L21/4857H01L23/49822H01L23/49894H01L25/16H01L24/05H01L24/13H01L24/16H01L2224/05611H01L2224/05613H01L2224/05616H01L2224/05624H01L2224/05639H01L2224/05644H01L2224/05647H01L2224/05655H01L2224/16227
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Quick Facts
Patent No.
US 12,431,422
App. No.
18/150,567
Granted
Sep 30, 2025
Kind
B2
Abstract

A semiconductor device has a one-layer interconnect substrate and electrical component disposed over a first surface of the interconnect substrate. The electrical components can be discrete electrical devices, IPDs, semiconductor die, semiconductor packages, surface mount devices, and RF components. An RDL with a graphene core shell is formed over a second surface of the interconnect substrate. The graphene core shell has a copper core and a graphene coating formed over the copper core. The RDL further has a matrix to embed the graphene core shell. The graphene core shells through RDL form an electrical path. The RDL can be thermoset material or polymer or composite epoxy type matrix. The graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix. The RDL with graphene core shell is useful for electrical conductivity and electrical interconnect within an SIP.

Claims (44)

1. A semiconductor device, comprising:

a substrate;

an electrical component disposed over a first surface of the substrate; and

a conductive layer including a plurality of graphene core shells formed over a second surface of the substrate opposite the first surface of the substrate, wherein each graphene core shell of the plurality of graphene core shells contacts another graphene core shell to form a continuous electrical path through the graphene core shells between a first surface of the conductive layer and a second surface of the conductive layer opposite the first surface of the conductive layer.

2. The semiconductor device of claim 1 , wherein the graphene core shell includes a copper core.

3. The semiconductor device of claim 2 , wherein the graphene core shell further includes a graphene coating formed over the copper core.

4. The semiconductor device of claim 1 , wherein the conductive layer further includes a matrix to embed the graphene core shell.

5. The semiconductor device of claim 1 , wherein each graphene core shell includes a spherical core with a graphene mesh network disposed over a surface of the spherical core.

6. The semiconductor device of claim 1 , wherein the conductive layer includes thermoset material or polymer or composite epoxy type matrix and the graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix.

7. A semiconductor device, comprising:

a substrate; and

a redistribution layer (RDL) including a plurality of graphene core shells formed over a first surface of the substrate, wherein each graphene core shell of the plurality of graphene core shells contacts another graphene core shell to form a continuous electrical path through the graphene core shells between a first surface of the RDL and a second surface of the RDL opposite the first surface of the RDL.

8. The semiconductor device of claim 7 , further including an electrical component disposed over a second surface of the substrate opposite the first surface of the substrate.

9. The semiconductor device of claim 7 , wherein the RDL is printed on the first surface of the substrate.

10. The semiconductor device of claim 7 , wherein the graphene core shell includes a copper core.

11. The semiconductor device of claim 10 , wherein the graphene core shell further includes a graphene coating formed over the copper core.

12. The semiconductor device of claim 7 , wherein the RDL further includes a matrix to embed the graphene core shell.

13. The semiconductor device of claim 7 , wherein each graphene core shell includes a spherical core with a graphene mesh network disposed over a surface of the spherical core.

14. A method of making a semiconductor device, comprising:

providing a substrate;

disposing an electrical component over a first surface of the substrate; and

forming a conductive layer including a plurality of graphene core shells over a second surface of the substrate opposite the first surface of the substrate, wherein each graphene core shell of the plurality of graphene core shells contacts another graphene core shell to form a continuous electrical path through the graphene core shells between a first surface of the conductive layer and a second surface of the conductive layer opposite the first surface of the conductive layer.

15. The method of claim 14 , wherein the graphene core shell includes a copper core.

16. The method of claim 15 , wherein the graphene core shell further includes forming a graphene coating over the copper core.

17. The method of claim 14 , wherein forming the conductive layer further includes providing a matrix to embed the graphene core shell.

18. The method of claim 14 , wherein each graphene core shell includes a spherical core with a graphene mesh network disposed over a surface of the spherical core.

19. The method of claim 14 , wherein the conductive layer includes thermoset material or polymer or composite epoxy type matrix and the graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix.

20. A method of making a semiconductor device, comprising:

providing a substrate; and

forming a redistribution layer (RDL) including a plurality of graphene core shells over a first surface of the substrate, wherein each graphene core shell of the plurality of graphene core shells contacts another graphene core shell to form a continuous electrical path through the graphene core shells between a first surface of the RDL and a second surface of the RDL opposite the first surface of the RDL.

21. The method of claim 20 , further including disposing an electrical component over a second surface of the substrate opposite the first surface of the substrate.

22. The method of claim 20 , wherein forming the RDL includes printing the RDL on the first surface of the substrate.

23. The method of claim 20 , wherein the graphene core shell includes a copper core.

24. The method of claim 23 , wherein the graphene core shell further includes forming a graphene coating over the copper core.

25. The method of claim 20 , wherein each graphene core shell includes a spherical core with a graphene mesh network disposed over a surface of the spherical core.

26. A semiconductor device, comprising:

a substrate; and

a conductive layer including a plurality of graphene core shells formed over a first surface of the substrate, wherein each graphene core shell of the plurality of graphene core shells contacts another graphene core shell to form a continuous electrical path through the graphene core shells.

27. The semiconductor device of claim 26 , wherein the graphene core shell includes a copper core.

28. The semiconductor device of claim 27 , wherein the graphene core shell further includes a graphene coating formed over the copper core.

29. The semiconductor device of claim 26 , wherein the conductive layer further includes a matrix to embed the graphene core shell.

30. The semiconductor device of claim 26 , wherein each graphene core shell includes a spherical core with a graphene mesh network disposed over a surface of the spherical core.

31. The semiconductor device of claim 26 , wherein the conductive layer includes thermoset material or polymer or composite epoxy type matrix and the graphene core shell is embedded within the thermoset material or polymer or composite epoxy type matrix.

32. The semiconductor device of claim 26 , further including an electrical component disposed over a second surface of the substrate opposite the first surface of the substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2023
From: SHIN, YONGMOO; KIM, SINJAE; KOO, KYOWANG; PARK, HYUNSEOK
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 062286/0627 →
Continuity (1)
Related Publication 20240234291A1 · Jul 11, 2024
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