Semiconductor device having a passivation layer
A semiconductor device includes a conductive pad over an interconnect structure, wherein the conductive pad is electrically connected to an active device. The semiconductor device further includes a dielectric layer over the conductive pad, wherein the dielectric layer has a first conformity. The semiconductor device further includes a passivation layer over the dielectric layer, wherein the passivation layer has a second conformity different from the first conformity.
1. A semiconductor device comprising:
a conductive pad over an interconnect structure, wherein the conductive pad is electrically connected to an active device;
a dielectric layer over the conductive pad, wherein the dielectric layer has a first conformity; and
a passivation layer over the dielectric layer, wherein the passivation layer has a second conformity different from the first conformity.
2. The semiconductor device of claim 1 , wherein the second conformity is higher than the first conformity.
3. The semiconductor device of claim 1 , wherein the dielectric layer is a continuous layer over sidewalls and a top surface of the conductive pad.
4. The semiconductor device of claim 1 , wherein the passivation layer is a continuous layer.
5. The semiconductor device of claim 1 , wherein the dielectric layer and the passivation layer comprise a same material.
6. The semiconductor device of claim 5 , wherein an interface exists between the dielectric layer and the passivation layer.
7. The semiconductor device of claim 1 , wherein the dielectric layer and the passivation layer comprise different materials.
8. The semiconductor device of claim 1 , wherein a total thickness of the conductive pad, the dielectric layer and the passivation layer ranges from about 25,000 angstroms to about 30,000 angstroms.
9. A semiconductor device comprising:
a conductive pad over an interconnect structure;
a dielectric layer over the conductive pad, wherein the dielectric layer has a first conformity; and
a passivation layer over the dielectric layer, wherein the passivation layer has a second conformity different from the first conformity, wherein a top surface of the conductive pad is co-planar with a top surface of the dielectric layer or a top surface of the passivation layer.
10. The semiconductor device of claim 9 , wherein the top surface of the conductive pad is co-planar with the top surface of the dielectric layer and the top surface of the passivation layer.
11. The semiconductor device of claim 9 , wherein the dielectric layer is between a sidewall of the conductive pad and the passivation layer.
12. The semiconductor device of claim 9 , wherein a thickness of the passivation layer ranges from about 200 Angstroms to about 15,000 Angstroms.
13. The semiconductor device of claim 9 , wherein the dielectric layer comprises a different material from the passivation layer.
14. The semiconductor device of claim 9 , further comprising a second passivation layer over the passivation layer, wherein the second passivation layer comprises a different material from the passivation layer.
15. The semiconductor device of claim 14 , wherein the top surface of the conductive pad is co-planar with a top surface of the second passivation layer.
16. A semiconductor device comprising:
a conductive pad over an interconnect structure, wherein the conductive pad is electrically connected to an active device;
a dielectric layer over the conductive pad, wherein the dielectric layer has a first conformity; and
a first passivation layer over the dielectric layer; and
a second passivation layer over the dielectric layer, wherein the second passivation layer has a second conformity different from the first conformity.
17. The semiconductor device of claim 16 , wherein the first passivation layer has the second conformity.
18. The semiconductor device of claim 16 , wherein a thickness of the first passivation layer is different from a thickness of the second passivation layer.
19. The semiconductor device of claim 16 , wherein the second conformity is greater than the first conformity.
20. The semiconductor device of claim 16 , wherein at least one of the first passivation layer or the second passivation layer comprises a material different from the dielectric layer.