IP Library › Granted Patent US 12,431,929
Granted Patent B2
US 12,431,929 · App. 17/897,620 · Granted Sep 30, 2025

Configurable receiver front end module having configurable detection capabilities

Inventors: Thomas Edward Voor (Cedar Park, TX); Jeffrey L. Sonntag (Greenville, SC); Richard Hendricks (Austin, TX); Logan Lucas (Austin, TX); Hendricus De Ruijter (San Jose, CA); Luigi Panseri (Austin, TX)
Assignee: Silicon Laboratories Inc.
H04B1/18H04B1/10H04B1/1607
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,431,929
App. No.
17/897,620
Granted
Sep 30, 2025
Kind
B2
Abstract

In one aspect, an apparatus includes a receive path to receive, process and output a receive radio frequency (RF) signal, the receive path comprising at least one low noise amplifier (LNA) and a plurality of signal nodes. The receive path may be configurable to operate in a plurality of modes. The apparatus also may include at least one filter to filter the receive RF signal and at least one detector circuit to detect one or more levels present at one or more of the plurality of signal nodes. The apparatus may configure an order of the at least one LNA and the at least one filter, based at least in part on the one or more levels detected in the at least one detector circuit.

Claims (33)

1. An apparatus comprising:

a receive path to receive, process and output a receive radio frequency (RF) signal, the receive path comprising at least one low noise amplifier (LNA) and a plurality of signal nodes, the receive path configurable to operate in a plurality of receive modes;

at least one filter to filter the receive RF signal; and

at least one detector circuit to detect one or more levels present at one or more of the plurality of signal nodes, wherein the apparatus is to configure an order of the at least one LNA and the at least one filter, based at least in part on the one or more levels detected in the at least one detector circuit, a first mode of the plurality of receive modes having a first relative order of the at least one LNA and the at least one filter and a second mode of the plurality of receive modes having a second relative order of the at least one LNA and the at least one filter, the second relative order different than the first relative order, and wherein:

in the first mode, the at least one detector circuit is to detect the one or more levels at an input to the at least one LNA via a first signal node of the plurality of signal nodes; and

in the second mode, the at least one detector circuit is to detect the one or more levels at an input to the at least one filter via a second signal node of the plurality of signal nodes.

2. The apparatus of claim 1 , further comprising switching circuitry coupled to the receive path, the switching circuitry to configure the receive path into a selected one of the plurality of receive modes, based at least in part on the one or more levels detected in the at least one detector circuit.

3. The apparatus of claim 2 , wherein the switching circuitry, in at least one of the plurality of receive modes, is to cause the receive path to bypass the at least one LNA.

4. An apparatus comprising:

a receive path to receive, process and output a receive radio frequency (RF) signal, the receive path comprising at least one low noise amplifier (LNA) and a plurality of signal nodes, the receive path configurable to operate in a plurality of modes;

at least one filter to filter the receive RF signal;

at least one detector circuit to detect one or more levels present at one or more of the plurality of signal nodes, wherein the apparatus is to configure an order of the at least one LNA and the at least one filter, based at least in part on the one or more levels detected in the at least one detector circuit; and

switching circuitry coupled to the receive path, the switching circuitry to configure the receive path into a selected one of the plurality of modes, based at least in part on the one or more levels detected in the at least one detector circuit, wherein the switching circuitry:

in a first mode of the plurality of modes, is to cause the at least one detector circuit to detect the level of the receive RF signal at an input to the at least one LNA via a first signal node of the plurality of signal nodes;

in a second mode of the plurality of modes, is to cause the at least one detector circuit to detect the level of the receive RF signal at an input to the at least one filter via a second signal node of the plurality of signal nodes; and

in a third mode of the plurality of modes, the switching circuitry is to cause the at least one detector circuit to detect the level of the receive RF signal at the input to the at least one LNA, wherein in the third mode the input to the at least one LNA is coupled to an output of the at least one filter via a third signal node of the plurality of signal nodes.

5. The apparatus of claim 4 , wherein the at least one detector circuit comprises:

a first RF detector coupled to an input to the at least one LNA; and

a second RF detector coupled to an input to the at least one filter.

6. The apparatus of claim 4 , wherein the apparatus comprises a RF front end circuit comprising the receive path, the RF front end circuit to couple to a processor having a controller, wherein the controller is to control the switching circuitry.

7. The apparatus of claim 6 , further comprising a first integrated circuit comprising the RF front end circuit and a second integrated circuit comprising the processor, wherein the at least one filter comprises a discrete component coupled to the first integrated circuit.

8. The apparatus of claim 4 , wherein when the apparatus is adapted in a first wireless device, the switching circuitry is configured to statically maintain the receive path in the selected one of the plurality of receive modes.

9. The apparatus of claim 8 , wherein the first wireless device comprises firmware to cause the switching circuitry to be configured to statically maintain the receive path in the selected one of the plurality of receive modes.

10. The apparatus of claim 4 , further comprising an impedance matching element coupled to an input to the at least one filter.

11. An apparatus comprising:

a receive path to receive, process and output a receive radio frequency (RF) signal, the receive path comprising at least one low noise amplifier (LNA), the receive path configurable to operate in a plurality of receive modes;

at least one filter to filter the receive RF signal;

at least one detector circuit to detect a level at one or more of a plurality of signal nodes of the receive path; and

switching circuitry coupled to the receive path, the switching circuitry to configure the receive path to have a selected order of the at least one LNA and the at least one filter according to a selected one of the plurality of receive modes, the at least one LNA and the at least one filter having a first relative order according to a first receive mode and the at least one LNA and the at least one filter having a second relative order different than the first relative order according to a second receive mode, wherein:

in the first receive mode, the at least one detector circuit is to detect the level at an input to the at least one LNA via a first signal node of the plurality of signal nodes; and

in the second receive mode, the at least one detector circuit is to detect the level at an input to the at least one filter via a second signal node of the plurality of signal nodes.

12. The apparatus of claim 11 , wherein the switching circuitry is to configure the receive path to have the selected order, based at least in part on the level at the one or more of the plurality of nodes.

13. The apparatus of claim 11 , wherein the switching circuitry, in another mode of the plurality of receive modes, is to configure the receive path to bypass the at least one LNA.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2022
From: VOOR, THOMAS EDWARD; SONNTAG, JEFFREY L.; HENDRICKS, RICHARD; LUCAS, LOGAN; DE RUIJTER, HENDRICUS; PANSERI, LUIGI
To: SILICON LABORATORIES INC.
Reel/Frame 062020/0001 →
Continuity (2)
Continuation In Part 17851534 · Jun 28, 2022
Related Publication 20230421194A1 · Dec 28, 2023
References Cited (84)
US 5343094A · Nguyen · 1994 [cited by applicant]
US 7151759B1 · Ryan et al. · 2006 [cited by applicant]
US 9154166B2 · Darabi et al. · 2015 [cited by applicant]
US 9793871B1 · Kim et al. · 2017 [cited by applicant]
US 10056875B1 · Beaudin et al. · 2018 [cited by applicant]
US 11337162B1 · Cariou et al. · 2022 [cited by applicant]
US 11901924B2 · Voor et al. · 2024 [cited by applicant]
US 20040140719A1 · Vulih et al. · 2004 [cited by applicant]
US 20080182534A1 · Bonesteel et al. · 2008 [cited by applicant]
US 20130135043A1 · Hietala et al. · 2013 [cited by applicant]
US 20130182785A1 · Koifman et al. · 2013 [cited by applicant]
US 20130207473A1 · Jain · 2013 [cited by applicant]
US 20150270744A1 · Lacarnoy · 2015 [cited by applicant]
US 20160014613A1 · Ponnampalam et al. · 2016 [cited by applicant]
US 20160248470A1 · Kunihiro et al. · 2016 [cited by applicant]
US 20160277045A1 · Langer · 2016 [cited by applicant]
US 20160301369A1 · Heaney et al. · 2016 [cited by applicant]
US 20160337971A1 · Bhargava et al. · 2016 [cited by applicant]
US 20170279415A1 · Wallis · 2017 [cited by applicant]
US 20180014266A1 · Chen · 2018 [cited by applicant]
US 20180026592A1 · Wallis · 2018 [cited by applicant]
US 20180192379A1 · Gross et al. · 2018 [cited by applicant]
US 20180226367A1 · Babcock et al. · 2018 [cited by applicant]
US 20180226932A1 · Beaudin · 2018 [cited by examiner]
US 20190013836A1 · Pehlke · 2019 [cited by examiner]
US 20190212715A1 · Yoshioka · 2019 [cited by applicant]
US 20200067559A1 · Wich · 2020 [cited by examiner]
US 20200321935A1 · Ayranci et al. · 2020 [cited by applicant]
US 20210218434A1 · Pehlke · 2021 [cited by applicant]
US 20210320081A1 · Babcock et al. · 2021 [cited by applicant]
US 20220182084A1 · King et al. · 2022 [cited by applicant]
US 20220214385A1 · Hecht et al. · 2022 [cited by applicant]
US 20220345098A1 · Panseri · 2022 [cited by applicant]
US 20220345170A1 · Panseri et al. · 2022 [cited by applicant]
US 20230239702A1 · Marina et al. · 2023 [cited by applicant]
US 20230253923A1 · Li · 2023 [cited by examiner]
US 20230421183A1 · Voor et al. · 2023 [cited by applicant]
US 20230421191A1 · Voor et al. · 2023 [cited by applicant]
US 20230421192A1 · De Ruijter et al. · 2023 [cited by applicant]
US 20230421193A1 · De Ruijter et al. · 2023 [cited by applicant]
US 20230421194A1 · Voor et al. · 2023 [cited by applicant]
US 20230421197A1 · De Ruijter et al. · 2023 [cited by applicant]
US 20230422053A1 · Voor et al. · 2023 [cited by applicant]
US 20240373194A1 · Kozin et al. · 2024 [cited by applicant]
United States Patent Office, Reply to Final Office Action filed Aug. 22, 2024 in U.S. Appl. No. 17/851,534 (8 pages). [cited by applicant]
Silicon Labs, “MGM12P Wireless Gecko Multi-Protocol Module Data Sheet,” Date Unknown, Rev. 1.4, 100 Pages. [cited by applicant]
U.S. Appl. No. 17/851,534, filed Jun. 28, 2022, entitled “Providing a Single Filter for Transmit and Receive Modes” in the name of Thomas Edward Voor. [cited by applicant]
U.S. Appl. No. 17/897,637, filed Aug. 29, 2022, entitled “Control of Configurable Receiver Front End Module Based at Least in Part on Signal Metric Information” in the name of Thomas Edward Voor. [cited by applicant]
U.S. Appl. No. 17/897,652, filed Aug. 29, 2022, entitled “Initialization of Configurable Receiver Front End Module Into a Selected Mode” in the name of Hendricus De Ruijter. [cited by applicant]
U.S. Appl. No. 17/897,671, filed Aug. 29, 2022, entitled “Reconfiguration of Configurable Receiver Front End Module Between Plurality of Modes” in the name of Hendricus De Ruijter. [cited by applicant]
U.S. Appl. No. 17/897,693, filed Aug. 29, 2022, entitled “Interrupt Driven Reconfiguration of Configurable Receiver Front End Module” in the name of Hendricus De Ruijter. [cited by applicant]
U.S. Appl. No. 17/897,706, filed Aug. 29, 2022, entitled “Power Variation Correction for a Transmitter” in the name of Thomas Edward Voor. [cited by applicant]
U.S. Appl. No. 17/897,721, filed Aug. 29, 2022, entitled “Central Entity Update of Configurable Receiver Front End Module Between Static Modes ” in the name of Thomas Edward Voor. [cited by applicant]
United States Patent Office, Notice of Allowance dated Oct. 4, 2023 in U.S. Appl. No. 17/897,706 (9 pages). [cited by applicant]
United States Patent Office, Reply to Office Action filed Sep. 26, 2023 in U.S. Appl. No. 17/897,706 (7 pages). [cited by applicant]
United States Patent Office, Notice of Allowance dated Oct. 13, 2023 in U.S. Appl. No. 17/897,652 (17 pages). [cited by applicant]
United States Patent Office, Non-Final Office Action dated Dec. 7, 2023 in U.S. Appl. No. 17/851,534 (26 pages). [cited by applicant]
United States Patent Office, Non-Final Office Action dated Feb. 21, 2024 in U.S. Appl. No. 17/897,693 (26 pages). [cited by applicant]
Bisdounis et al., “Low-power system-on-chip architecture for wireless LANs”, IEE Proceedings-Computers and Digital Techniques, vol. 151, No. 1, Jan. 2004, pp. 2-15. [cited by applicant]
United States Patent Office, Rsponse after Final Office Action Filed Nov. 25, 2024 in U.S. Appl. No. 17/897,693 (11 pages). [cited by applicant]
United States Patent Office, Advisory Action dated Sep. 5, 2024 in U.S. Appl. No. 17/851,534 (4 pages). [cited by applicant]
United States Patent Office, Final Office Action dated Oct. 4, 2024 in U.S. Appl. No. 17/897,693 (19 pages). [cited by applicant]
United States Patent Office, Reply to Office Action filed May 21, 2024 in U.S. Appl. No. 17/897,693 (9 pages). [cited by applicant]
United States Patent Office, Notice of Allowance dated Dec. 4, 2024 in U.S. Appl. No. 17/851,534 (13 pages). [cited by applicant]
United States Patent Office, Notice of Allowance dated Dec. 19, 2024 in U.S. Appl. No. 17/897,693 (14 pages). [cited by applicant]
United States Patent Office, Reply to Office Action dated Mar. 7, 2024 in U.S. Appl. No. 17/851,534 (8 pages). [cited by applicant]
United States Patent Office, Final Office Action dated Jun. 27, 2024 in U.S. Appl. No. 17/851,534 (22 pages). [cited by applicant]
United States Patent Office, Non-Final Office Action dated Jul. 19, 2023 in U.S. Appl. No. 17/897,706 (10 pages). [cited by applicant]
United States Patent Office, Restriction Requirement dated Jan. 17, 2025 in U.S. Appl. No. 17/897,721 (8 pages). [cited by applicant]
United States Patent Office, Restriction Requirement dated Jan. 17, 2025 in U.S. Appl. No. 17/897,637 (8 pages). [cited by applicant]
United States Patent Office, Reply to Restriction Requirement filed Jan. 21, 2025 in U.S. Appl. No. 17/897,721 (8 pages). [cited by applicant]
United States Patent Office, Reply to Restriction Requirement filed Jan. 21, 2025 in U.S. Appl. No. 17/897,637 (7 pages). [cited by applicant]
United States Patent Office, Non-Final Office Action dated Jan. 31, 2025 in U.S. Appl. No. 17/897,637 (55 pages). [cited by applicant]
United States Patent Office, Restriction Requirement dated Feb. 5, 2025 in U.S. Appl. No. 17/897,671 (8 pages). [cited by applicant]
United States Patent Office, Reply to Restriction Requirement filed Feb. 6, 2025 in U.S. Appl. No. 17/897,671 (7 pages). [cited by applicant]
United States Patent Office, Non-Final Office Action dated Feb. 13, 2025 in U.S. Appl. No. 17/897,721 (62 pages). [cited by applicant]
United States Patent Office, Non-Final Office Action dated Mar. 21, 2025 in U.S. Appl. No. 17/897,671 (59 pages). [cited by applicant]
United States Patent Office, Reply to Office Action filed Apr. 17, 2025 in U.S. Appl. No. 17/897,637 (8 pages). [cited by applicant]
United States Patent Office, Reply to Office Action filed May 13, 2025 in U.S. Appl. No. 17/897,721 (9 pages). [cited by applicant]
United States Patent Office, Reply to Office Action filed Jun. 20, 2025 in U.S. Appl. No. 17/897,671 (8 pages). [cited by applicant]
United States Patent Office, Office Action dated Jul. 18, 2025 in United States U.S. Appl. No. 17/897,637 (30 pages). [cited by applicant]
United States Patent Office, Non-Final Office Action dated Aug. 26, 2025 in United States U.S. Appl. No. 17/897,721 (28 pages). [cited by applicant]
German Patent Office, Office Action dated Jul. 25, 2025 in German Patent Application No. 102023108060.1 (17 pages). [cited by applicant]
German Patent Office, Office Action dated Jul. 31, 2025 in German Patent Application No. 102023108064.4 (20 pages). [cited by applicant]