IP Library › Granted Patent US 12,437,698
Granted Patent B2
US 12,437,698 · App. 18/442,101 · Granted Oct 7, 2025

Driver and display device including the same

Inventor: Keunwoo Kim (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/2092G09G2310/0267G09G2310/0286G09G2330/021
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Quick Facts
Patent No.
US 12,437,698
App. No.
18/442,101
Granted
Oct 7, 2025
Kind
B2
Abstract

A driver is disclosed that includes an input circuit that transmits an input signal to a first node in response to at least one of a clock signal and an inverted clock signal, and an inverter that generates an output signal based on a voltage of the first node. Each of the input circuit and the inverter includes a first transistor and a second transistor connected to each other, an active area of the first transistor and an active area of the second transistor include different materials, and a gate terminal of the second transistor is electrically connected to a semiconductor material spaced apart from the active area of the second transistor.

Claims (23)

1. A driver comprising:

an input circuit that transmits an input signal to a first node in response to at least one of a clock signal and an inverted clock signal; and

an inverter that generates an output signal based on a voltage of the first node,

wherein each of the input circuit and the inverter includes a first transistor and a second transistor connected to each other,

an active area of the first transistor and an active area of the second transistor include different materials, and

a gate terminal of the second transistor is electrically connected to a semiconductor material spaced apart from the active area of the second transistor,

wherein the gate terminal of the second transistor includes an upper gate terminal and a lower gate terminal, and

the upper gate terminal is electrically connected to the lower gate terminal.

2. The driver of claim 1 , wherein the semiconductor material is connected to the upper gate terminal and the lower gate terminal, and

the upper gate terminal is electrically connected to the lower gate terminal through the semiconductor material.

3. The driver of claim 2 , wherein the semiconductor material is in Schottky contact with the upper gate terminal and the lower gate terminal.

4. The driver of claim 3 , wherein each of a work function of the upper gate terminal and a work function of the lower gate terminal is greater than a work function of the semiconductor material.

5. The driver of claim 2 , wherein the semiconductor material is in ohmic contact with the upper gate terminal and the lower gate terminal.

6. The driver of claim 1 , wherein the first transistor is a PMOS transistor, and

the second transistor is an NMOS transistor.

7. The driver of claim 1 , wherein the active area of the first transistor includes a silicon semiconductor, and

the active area of the second transistor includes an oxide semiconductor.

8. The driver of claim 1 , wherein the inverter includes:

a first inverter that inverts a voltage of the first node and provides an inverted voltage to a second node; and

a second inverter that inverts a voltage of the second node and generates the output signal.

9. An electronic device comprising:

the driver of claim 1 ; and

pixels electrically connected to the driver.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 15, 2024
From: KIM, KEUNWOO
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 066467/0049 →
Priority Claims (1)
KR 10-2023-0086550 · Jul 4, 2023 · national
Continuity (1)
Related Publication 20250014497A1 · Jan 9, 2025
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