IP Library › Granted Patent US 12,444,679
Granted Patent B2
US 12,444,679 · App. 17/736,725 · Granted Oct 14, 2025

Three-dimensional memory devices having a cylindrical body and plate line contact segments

Inventors: Yuancheng Yang (Hubei, CN); DongXue Zhao (Hubei, CN); Tao Yang (Hubei, CN); Lei Liu (Hubei, CN); Di Wang (Hubei, CN); Kun Zhang (Hubei, CN); Wenxi Zhou (Hubei, CN); ZhiLiang Xia (Hubei, CN); ZongLiang Huo (Hubei, CN)
Assignee: Yangtze Memory Technologies Co., Ltd.
H01L23/5283H10B41/20H10B43/20
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Quick Facts
Patent No.
US 12,444,679
App. No.
17/736,725
Granted
Oct 14, 2025
Kind
B2
Abstract

Embodiments of three-dimensional memory devices are disclosed. A disclosed memory structure can comprises a memory cell, a bit line contact coupled to the memory cell, a bit line coupled to the bit line contact, a source line contact coupled to the memory cell, and a source line coupled to the source line contact. The memory cell comprises a cylindrical body having a cylindrical shape, an insulating layer surrounding the cylindrical body, a word line contact surrounding a first portion of the insulating layer, the word line contact coupled to a word line, and a plurality of plate line contact segments surrounding a second portion of the insulating layer, the plurality of plate line contact segments coupled to a common plate line.

Claims (51)

1. A memory structure, comprising:

a memory cell comprising:

a cylindrical body having a cylindrical shape;

an insulating layer surrounding the cylindrical body;

a word line contact surrounding a first portion of the insulating layer, the word line contact coupled to a word line; and

a plurality of plate line contact segments surrounding a second portion of the insulating layer, the plurality of plate line contact segments coupled to a common plate line;

a bit line contact coupled to the memory cell, the bit line contact coupled to a bit line; and

a source line contact coupled to the memory cell, the source line contact coupled to a source line.

2. The memory structure of claim 1 , wherein:

the cylindrical body extends in a first direction;

the word line contact and the plurality of plate line contact segments each surrounds the cylindrical body in a corresponding plane perpendicular to the first direction; and

the word line contact and the plurality of plate line contact segments are arranged in a sequence along the first direction.

3. The memory structure of claim 1 , wherein each of the plurality of plate line contact segments has a substantially same first height along a first direction.

4. The memory structure of claim 3 , wherein the first height is substantially equal to a second height of the word line contact along the first direction.

5. The memory structure of claim 1 , wherein each pair of adjacent plate line contact segments has a substantially same first distance between the pair of adjacent plate line contact segments along a first direction.

6. The memory structure of claim 5 , wherein the first distance is substantially equal to a second distance between the word line contact and an adjacent plate line contact segment.

7. The memory structure of claim 5 , wherein the first distance is different than a second distance between the word line contact and an adjacent plate line contact segment.

8. A memory structure, comprising:

a memory cell comprising:

a cylindrical body having a cylindrical shape;

an insulating layer surrounding the cylindrical body;

a word line contact surrounding a first portion of the insulating layer, the word line contact coupled to a word line; and

a plurality of plate line contact segments surrounding a second portion of the insulating layer, the plurality of plate line contact segments coupled to a plurality of independent plate lines respectively and coupled to a common plate line;

a bit line contact coupled to the memory cell, the bit line contact coupled to a bit line; and

a source line contact coupled to the memory cell, the source line contact coupled to a source line.

9. The memory structure of claim 8 , wherein:

the cylindrical body extends in a first direction;

the word line contact and the plurality of plate line contact segments each surround the cylindrical body in a corresponding plane perpendicular to the first direction; and

the word line contact and the plurality of plate line contact segments are arranged in a sequence along the first direction.

10. The memory structure of claim 8 , wherein each of the plurality of plate line contact segments has a substantially same first height along a first direction.

11. The memory structure of claim 10 , wherein the first height is substantially equal to a second height of the word line contact along the first direction.

12. The memory structure of claim 8 , wherein each pair of adjacent plate line contact segments has a substantially same first distance between the pair of adjacent plate line contact segments along a first direction.

13. The memory structure of claim 12 , wherein the first distance is substantially equal to a second distance between the word line contact and an adjacent plate line contact segment.

14. The memory structure of claim 12 , wherein the first distance is different to a second distance between the word line contact and an adjacent plate line contact segment.

15. A memory structure, comprising:

a bottom conductive layer having a first type dopant;

a memory stack on the bottom conductive layer, the memory stack comprising a plurality of alternatively arranged dielectric layers and conductive layers;

a cylindrical body embedded in the memory stack, the cylindrical body having a second type dopant opposite from the first type dopant; and

a top contact on the cylindrical body, the top contact having the first type dopant, wherein:

the top contact is coupled to a bit line;

a top conductive layer of the memory stack is coupled to a word line;

the plurality of conductive layers other than the top conductive layer of the memory stack are coupled to a plurality of plate lines respectively, and the plurality of plate lines are connected to a common voltage source; and

the bottom conductive layer is coupled to a source line.

16. The memory structure of claim 15 , wherein the plurality of plate lines are connected to a plurality of independent voltage sources.

17. The memory structure of claim 15 , wherein each of the plurality of conductive layers of the memory stack has a substantially same first thickness.

18. The memory structure of claim 17 , wherein each of the plurality of dielectric layers of the memory stack has a substantially same second thickness.

19. The memory structure of claim 18 , wherein a top dielectric layer of the memory stack has a third thickness that is different from the second thickness of other dielectric layers of the memory stack.

20. The memory structure of claim 15 , wherein:

the cylindrical body extends in a first direction;

the word line and the plurality of plate lines each surrounds the cylindrical body in a corresponding plane perpendicular to the first direction; and

the word line and the plurality of plate lines are arranged in a sequence along the first direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2023
From: YANG, YUANCHENG; ZHAO, DONGXUE; YANG, TAO; LIU, LEI; WANG, DI; ZHANG, KUN; ZHOU, WENXI; XIA, ZHILIANG; HUO, ZONGLIANG
To: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
Reel/Frame 065947/0622 →
Continuity (2)
Continuation PCTCN2022079162 · Mar 4, 2022
Related Publication 20230282576A1 · Sep 7, 2023
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