Active phased array antenna comprising a pseudo wafer including multiple feeders
There is provided an active phased array antenna in which power to an Si wafer is separated from power to compound semiconductor chips. An active phased array antenna is an active phased array antenna including a substrate having a plurality of antenna elements; a pseudo wafer containing a group of semiconductor chips including a plurality of semiconductor chips made of compound semiconductors; and a silicon wafer made of silicon, the substrate, the pseudo wafer, and the silicon wafer being stacked on top of each other in this order, and the pseudo wafer includes first feeders for supplying power to the group of semiconductor chips from the substrate; and a second feeder for supplying power to the silicon wafer from the substrate, the second feeder passing through the pseudo wafer in a thickness direction of the pseudo wafer.
1. An active phased array antenna comprising:
a substrate having a plurality of antenna elements;
a pseudo wafer containing a group of semiconductor chips including a plurality of semiconductor chips made of compound semiconductors; and
a silicon wafer made of silicon, the substrate, the pseudo wafer, and the silicon wafer being stacked on top of each other in this order, wherein
the pseudo wafer includes:
first feeders to supply power to the group of semiconductor chips from the substrate; and
a second feeder to supply power to the silicon wafer from the substrate, the second feeder passing through the pseudo wafer in a thickness direction of the pseudo wafer.
2. The active phased array antenna according to claim 1 , wherein
an area of the silicon wafer is greater than or equal to a sum of areas of antenna planes of two adjacent elements among the plurality of antenna elements, and
an area of one semiconductor chip among the plurality of semiconductor chips is smaller than an area of an antenna plane of one antenna element among the plurality of antenna elements.
3. The active phased array antenna according to claim 1 , wherein the plurality of semiconductor chips includes a semiconductor chip having input and output terminals formed on both front and rear surfaces of the semiconductor chip.
4. The active phased array antenna according to claim 2 , wherein the plurality of semiconductor chips includes a semiconductor chip having input and output terminals formed on both front and rear surfaces of the semiconductor chip.
5. The active phased array antenna according to claim 1 , wherein the plurality of semiconductor chips includes a semiconductor chip having input and output terminals formed only on one surface of the semiconductor chip, and
the pseudo wafer has multilayer redistribution to connect the input and output terminals of the semiconductor chip to input and output terminals of the silicon wafer.
6. The active phased array antenna according to claim 2 , wherein the plurality of semiconductor chips includes a semiconductor chip having input and output terminals formed only on one surface of the semiconductor chip, and
the pseudo wafer has multilayer redistribution to connect the input and output terminals of the semiconductor chip to input and output terminals of the silicon wafer.
7. The active phased array antenna according to claim 1 , wherein the pseudo wafer has a thermal via to thermally connect, instead of electrically connect, a surface of the pseudo wafer facing the substrate to any one of the semiconductor chips included in the group of semiconductor chips.
8. An active phased array antenna comprising:
a substrate having a plurality of antenna elements formed thereon;
a first pseudo wafer containing a first group of semiconductor chips including a plurality of semiconductor chips made of compound semiconductors;
a second pseudo wafer containing one or more silicon wafers made of silicon; and
a third pseudo wafer containing a second group of semiconductor chips including a plurality of semiconductor chips made of compound semiconductors, the substrate, the first pseudo wafer, the second pseudo wafer, and the third pseudo wafer being stacked on top of each other in this order, wherein
the first pseudo wafer includes:
first feeders to supply power to the first group of semiconductor chips from the substrate;
a second feeder to supply power to the one or more silicon wafers from the substrate, the second feeder passing through the first pseudo wafer in a thickness direction of the first pseudo wafer; and
a third feeder to supply power to the second group of semiconductor chips from the substrate, the third feeder passing through the first pseudo wafer in the thickness direction of the first pseudo wafer.
9. The active phased array antenna according to claim 8 , wherein the plurality of semiconductor chips includes a semiconductor chip having input and output terminals formed on both front and rear surfaces of the semiconductor chip.
10. The active phased array antenna according to claim 8 , wherein the plurality of semiconductor chips includes a semiconductor chip having input and output terminals formed only on one surface of the semiconductor chip, and
the first pseudo wafer has multilayer redistribution to connect the input and output terminals of the semiconductor chip to input and output terminals of the silicon wafer.
11. The active phased array antenna according to claim 8 , wherein the first pseudo wafer has a thermal via to thermally connect, instead of electrically connect, a surface of the first pseudo wafer facing the substrate to any one of the semiconductor chips included in the first group of semiconductor chips.
12. The active phased array antenna according to claim 9 , wherein the first pseudo wafer has a thermal via to thermally connect, instead of electrically connect, a surface of the first pseudo wafer facing the substrate to any one of the semiconductor chips included in the first group of semiconductor chips.
13. The active phased array antenna according to claim 10 , wherein the first pseudo wafer has a thermal via to thermally connect, instead of electrically connect, a surface of the first pseudo wafer facing the substrate to any one of the semiconductor chips included in the first group of semiconductor chips.
14. The active phased array antenna according to claim 8 , wherein the third feeder passes through the second pseudo wafer in a thickness direction of the second pseudo wafer.