Method for manufacturing oxide semiconductor thin film transistor
View Patent ↗Disclosed is a method of fabricating an oxide semiconductor thin-film transistor, the method including a step of forming an oxide semiconductor layer including a channel region, a source region, and a drain region on a substrate; a step of forming a gate insulating layer on the channel region; a step of forming a gate electrode on the gate insulating layer; and a step of forming a source electrode and a drain electrode on the source and drain regions, respectively, wherein the step of forming an oxide semiconductor layer includes a step of selectively plasma-treating the source and drain regions of the oxide semiconductor layer with a fluorine (F)-based gas, and the source and drain regions contain fluorine (F) at a concentration of 2×10 14 /cm 3 to 17.5×10 21 /cm 3 .
1. A method of fabricating an oxide semiconductor thin-film transistor, comprising:
a step of forming an oxide semiconductor layer having a thickness of 10 nm to 50 nm on a substrate, the oxide semiconductor layer comprising a channel region, a source region, and a drain region on a substrate;
a step of forming a gate insulating layer on the channel region;
a step of forming a gate electrode on the gate insulating layer; and
a step of forming a source electrode and a drain electrode on the source and drain regions, respectively,
wherein the step of forming an oxide semiconductor layer comprises a step of selectively plasma-treating the source and drain regions of the oxide semiconductor layer with a fluorine (F)-based gas, and
the source and drain regions contain fluorine (F) at a concentration of 2×10 14 /cm 3 to 17.5×10 21 /cm 3 ,
wherein the fluorine (F) is included in the source and drain regions of the oxide semiconductor layer at a concentration of 0.1% to 15%,
wherein, when viewed in a direction perpendicular to the substrate, the oxide semiconductor layer comprises a first offset region and a second offset region formed between the gate electrode and the source electrode and between the gate electrode and the drain electrode, respectively,
wherein the step of selectively plasma-treating the source and drain regions of the oxide semiconductor layer with the fluorine (F)-based gas comprises:
a first plasma treatment step of selectively plasma-treating the source and drain regions of the oxide semiconductor layer with the fluorine (F)-based gas, and
a second plasma treatment step of performing plasma treatment to decompose the fluorine-based gas in the first and second offset regions, and
wherein the concentration of oxygen vacancies in the source and drain regions of the oxide semiconductor layer is in a range of 15% to 35%.
2. The method according to claim 1 , wherein the fluorine-based gas diffuses on surfaces of the source and drain regions by plasma treatment.
3. The method according to claim 2 , wherein the fluorine diffuses to a depth of 5 nm to 20 nm from surfaces of the source and drain regions of the oxide semiconductor layer.
4. The method according to claim 1 , wherein the fluorine-based gas comprises at least one of carbon tetrafluoride (CF 4 ), nitrogen trifluoride (NF 3 ), and sulfur hexafluoride (SF 6 ).
5. The method according to claim 1 , wherein the plasma treatment is performed at a temperature of 20° C. to 420° C.
6. The method according to claim 1 , wherein the first and second offset regions each have a width of 0.5 μm or more.
7. The method according to claim 1 , wherein the source and drain regions plasma-treated with the fluorine (F)-based gas have a resistivity of 1×10 2 Ω·cm to 3×10 −3 Ω·cm.
8. A method of fabricating a dual gate thin-film transistor, comprising:
a step of forming a first gate electrode on a substrate;
a step of forming a first gate insulating layer on the first gate electrode;
a step of forming an oxide semiconductor layer having a thickness of 10 nm to 50 nm on a substrate, the oxide semiconductor layer comprising a channel region, a source region, and a drain region on the first gate insulating layer;
a step of forming a second gate insulating layer on the channel region;
a step of forming a second gate electrode on the second gate insulating layer; and
a step of forming a source electrode and a drain electrode on the source and drain regions, respectively,
wherein the step of forming an oxide semiconductor layer comprises a step of selectively plasma-treating the source and drain regions of the oxide semiconductor layer with a fluorine (F)-based gas, and
the source and drain regions contain fluorine (F) at a concentration of 2×10 14 /cm 3 to 17.5×10 21 /cm 3 ,
wherein the fluorine (F) is included in the source and drain regions of the oxide semiconductor layer at a concentration of 0.1% to 15%,
wherein, when viewed in a direction perpendicular to the substrate, the oxide semiconductor layer comprises a first offset region and a second offset region formed between the second gate electrode and the source electrode and between the second gate electrode and the drain electrode, respectively,
wherein the step of selectively plasma-treating the source and drain regions of the oxide semiconductor layer with the fluorine (F)-based gas comprises:
a first plasma treatment step of selectively plasma-treating the source and drain regions of the oxide semiconductor layer with the fluorine (F)-based gas, and
a second plasma treatment step of performing plasma treatment to decompose the fluorine-based gas in the first and second offset regions, and
wherein concentration of oxygen vacancies in the source and drain regions of the oxide semiconductor layer is in a range of 15% to 35%.
9. The method according to claim 8 , wherein the source and drain regions plasma-treated with the fluorine (F)-based gas have a resistivity of 1×10 2 Ω·cm to 3×10 −3 Ω·cm.