IP Library › Granted Patent US 12,455,420
Granted Patent B2
US 12,455,420 · App. 17/818,809 · Granted Oct 28, 2025

Photonic semiconductor device and method of manufacture

Inventors: Chen-Hua Yu (Hsinchu, TW); Hsing-Kuo Hsia (Jhubei, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
G02B6/4214G02B6/12002G02B6/12004G02B6/13G02B6/136G02B6/30G02B6/4206G02B6/4245G02B6/4274H04Q11/0005G02B2006/12061G02B2006/12107G02B2006/12121G02B2006/12123G02B2006/12147G02B6/124G02B6/34G02B6/4204G02B6/428H04Q2011/0035
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Quick Facts
Patent No.
US 12,455,420
App. No.
17/818,809
Granted
Oct 28, 2025
Kind
B2
Abstract

A device includes a photonic routing structure including a silicon waveguide, photonic devices, and a grating coupler, wherein the silicon waveguide is optically coupled to the photonic devices and to the grating coupler; an interconnect structure on the photonic routing structure, wherein the grating coupler is configured to optically couple to an external optical fiber disposed over the interconnect structure; and computing sites on the interconnect structure, wherein each computing site includes an electronic die bonded to the interconnect structure, wherein each electronic die of the computing sites is electrically connected to a corresponding photonic device of the photonic devices.

Claims (40)

1. A method, comprising:

patterning a silicon layer to form a waveguide;

forming a plurality of photonic components in the waveguide;

forming a grating coupler in the waveguide;

forming an interconnect structure over the waveguide and the plurality of photonic components, wherein the interconnect structure is electrically connected to the plurality of photonic components;

forming a plurality of computing sites on the interconnect structure, wherein forming each computing site of the plurality of computing sites comprises directly bonding a first semiconductor device to the interconnect structure, wherein the first semiconductor device of each computing site is electrically connected through the interconnect structure to at least one photonic component of the plurality of photonic components;

forming a dielectric layer on the interconnect structure and surrounding the first semiconductor devices of the plurality of computing sites; and

performing a planarization process on the dielectric layer, wherein top surfaces of the dielectric layer and top surfaces of the first semiconductor devices are level after performing the planarization process.

2. The method of claim 1 , further comprising attaching an optical fiber to the dielectric layer, wherein the optical fiber is optically coupled to the grating coupler through the interconnect structure and the dielectric layer.

3. The method of claim 1 , wherein forming each computing site of the plurality of computing sites further comprises attaching a respective second semiconductor device to the first semiconductor device.

4. The method of claim 3 further comprising encapsulating the second semiconductor devices with an encapsulant.

5. The method of claim 3 , wherein at least one respective second semiconductor device is a dummy device.

6. The method of claim 1 , further comprising:

removing a region of a sheet of molding material to form a cut-out region in the sheet of molding material; and

applying the sheet of molding material to the dielectric layer, wherein the cut-out region in the sheet of molding material is aligned over the grating coupler after applying the sheet of molding material.

7. The method of claim 1 , wherein directly bonding the first semiconductor device to the interconnect structure comprises a dielectric-to-dielectric bonding process.

8. The method of claim 1 further comprising forming an edge coupler in the waveguide.

9. The method of claim 1 , wherein the dielectric layer and the first semiconductor devices have a same thickness after performing the planarization process.

10. A method comprising:

forming a photonic routing structure comprising a silicon waveguide and a plurality of photonic devices, wherein the silicon waveguide is optically coupled to the plurality of photonic devices;

forming an interconnect structure on the photonic routing structure, wherein the interconnect structure comprises a plurality of conductive features in a plurality of first dielectric layers, wherein the interconnect structure is electrically coupled to the plurality of photonic devices;

forming a plurality of computing sites on the interconnect structure, wherein forming each computing site comprises directly bonding a respective semiconductor die to the interconnect structure, wherein each computing site is electrically coupled to at least one respective photonic device;

forming a second dielectric layer over the interconnect structure and on sidewalls of the semiconductor dies; and

mounting an optical fiber over the second dielectric layer, wherein the optical fiber is optically coupled to the silicon waveguide through the second dielectric layer and through the plurality of first dielectric layers.

11. The method of claim 10 , wherein the photonic routing structure further comprises a grating coupler, wherein the silicon waveguide is optically coupled to the grating coupler.

12. The method of claim 11 , wherein the grating coupler is configured to optically couple to the optical fiber.

13. The method of claim 10 , wherein each semiconductor die of the plurality of computing sites is electrically connected to a corresponding photonic device of the plurality of photonic devices.

14. The method of claim 10 , wherein connecting the respective semiconductor die to the interconnect structure comprises a direct bonding process.

15. The method of claim 10 further comprising, before forming the interconnect structure, forming through vias extending through the photonic routing structure.

16. A method comprising:

forming a waveguide on a substrate;

after forming the waveguide, forming through vias extending through the substrate;

after forming the through vias, forming an interconnect structure over the waveguide and over the through vias, wherein the interconnect structure directly contacts the through vias;

bonding a plurality of semiconductor devices to the interconnect structure, wherein each semiconductor device is communicatively coupled to the waveguide;

surrounding the plurality of semiconductor devices with a dielectric material, wherein top surfaces of the semiconductor devices are exposed; and

bonding the through vias to an interconnect substrate, wherein the through vias are communicatively coupled to the interconnect substrate.

17. The method of claim 16 further comprising forming a plurality of photodetectors in the waveguide, wherein each semiconductor device is communicatively coupled to the waveguide by a respective photodetector.

18. The method of claim 16 , wherein top surfaces of the semiconductor devices and the dielectric material are level.

19. The method of claim 16 , wherein the waveguide is continuous.

20. The method of claim 16 , wherein the dielectric material is a molding material.

Continuity (3)
Division 16929799 · Jul 15, 2020
Provisional Application 62906978 · Sep 27, 2019
Related Publication 20220382003A1 · Dec 1, 2022
References Cited (36)
US 9482816B2 · Van Campenhout et al. · 2016 [cited by applicant]
US 9874690B2 · Gambino et al. · 2018 [cited by applicant]
US 9910232B2 · Mekis et al. · 2018 [cited by applicant]
US 10578799B2 · Doerr et al. · 2020 [cited by applicant]
US 10606003B2 · Peterson et al. · 2020 [cited by applicant]
US 10795079B2 · Venkatesan et al. · 2020 [cited by applicant]
US 10873399B2 · Peterson et al. · 2020 [cited by applicant]
US 11002915B2 · Kuo et al. · 2021 [cited by applicant]
US 11362077B2 · Chang et al. · 2022 [cited by applicant]
US 11367711B2 · Harris et al. · 2022 [cited by applicant]
US 11415745B2 · Kuritsyn et al. · 2022 [cited by applicant]
US 20020097962A1 · Yoshimura · 2002 [cited by examiner]
US 20060177173A1 · Shastri et al. · 2006 [cited by applicant]
US 20130307139A1 · Chen · 2013 [cited by examiner]
US 20140010498A1 · Verslegers et al. · 2014 [cited by applicant]
US 20150309261A1 · Kobyakov · 2015 [cited by examiner]
US 20150331187A1 · Lee et al. · 2015 [cited by applicant]
US 20170068050A1 · Babakhani et al. · 2017 [cited by applicant]
US 20170299809A1 · Boeuf · 2017 [cited by examiner]
US 20180039021A1 · Usami · 2018 [cited by applicant]
US 20180120524A1 · Mathai et al. · 2018 [cited by applicant]
US 20180180808A1 · Zhang et al. · 2018 [cited by applicant]
US 20180259730A1 · Hochberg et al. · 2018 [cited by applicant]
US 20190243167A1 · Menezo et al. · 2019 [cited by applicant]
US 20190363797A1 · Peterson et al. · 2019 [cited by applicant]
US 20200003970A1 · Marchetti et al. · 2020 [cited by applicant]
US 20200081184A1 · Orcutt et al. · 2020 [cited by applicant]
US 20200161284A1 · Iida et al. · 2020 [cited by applicant]
US 20200264390A1 · Wade et al. · 2020 [cited by applicant]
US 20200310027A1 · Boeuf · 2020 [cited by examiner]
US 20210118853A1 · Harris et al. · 2021 [cited by applicant]
US 20210278590A1 · Harris et al. · 2021 [cited by applicant]
US 20220128759A1 · Islam et al. · 2022 [cited by applicant]
US 20220221646A1 · Kim et al. · 2022 [cited by applicant]
JP H02177481A · 1990 [cited by applicant]
JP 2016166939A · 2016 [cited by applicant]
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