IP Library › Granted Patent US 12,464,773
Granted Patent B2
US 12,464,773 · App. 17/677,422 · Granted Nov 4, 2025

Formation of a semiconductor device with a gate containing a metal oxide layer using an oxidation process

Inventors: Chia-Wei Chen (Hsinchu, TW); Jo-Chun Hung (Hsinchu, TW); Chih-Wei Lee (New Taipei, TW); Hui-Chi Chen (Zhudong Township, Hsinchu County, TW); Hsin-Han Tsai (Hsinchu, TW); Hsiang-Ju Liao (Changhua County, TW); Yi-Lun Li (Taipei, TW); Cheng-Lung Hung (Hsinchu, TW); Chi On Chui (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H10D30/6735H01L21/02614H01L21/76855H01L21/76886H01L21/76888H10D30/62H10D30/6757H10D62/118H10D62/119H10D62/123H10D64/01H10D64/667H10D84/0158H10D86/011
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Quick Facts
Patent No.
US 12,464,773
App. No.
17/677,422
Granted
Nov 4, 2025
Kind
B2
Abstract

A semiconductor device structure and a formation method are provided. The method includes forming a fin structure over a substrate, and the fin structure has multiple sacrificial layers and multiple semiconductor layers laid out alternately. The method also includes removing the sacrificial layers to release multiple semiconductor nanostructures made up of remaining portions of the semiconductor lavers. The method further includes forming a gate dielectric layer to wrap around the semiconductor nanostructures and forming a first metal-containing layer over the gate dielectric layer to wrap around the semiconductor nanostructures. In addition, the method includes introducing oxygen-containing plasma on the first metal-containing layer to transform an upper portion of the first metal-containing layer into a metal oxide layer. The method includes forming a second metal-containing layer over the metal oxide layer.

Claims (50)

1 . A method for forming a semiconductor device structure, comprising:

forming a fin structure over a substrate, wherein the fin structure has a plurality of sacrificial layers and a plurality of semiconductor layers laid out alternately;

removing the sacrificial layers to release a plurality of semiconductor nanostructures made up of remaining portions of the semiconductor layers;

forming a gate dielectric layer to wrap around the semiconductor nanostructures;

forming a first metal-containing layer over the gate dielectric layer to wrap around the semiconductor nanostructures;

introducing oxygen-containing plasma on the first metal-containing layer to transform an upper portion of the first metal-containing layer into a metal oxide layer; and

forming a second metal-containing layer over the metal oxide layer.

2 . The method for forming a semiconductor device structure as claimed in claim 1 , further comprising:

performing an etching back process to partially remove the first metal-containing layer, the metal oxide layer, and the second metal-containing layer; and

forming a metal-containing cap over top surfaces of the first metal-containing layer, the metal oxide layer, and the second metal-containing layer.

3 . The method for forming a semiconductor device structure as claimed in claim 1 , wherein the first metal-containing layer is formed at a temperature that is in a range from about 250 degrees C. to about 350 degrees C.

4 . The method for forming a semiconductor device structure as claimed in claim 1 , wherein the second metal-containing layer is formed at a temperature that is in a range from about 250 degrees C. to about 350 degrees C.

5 . The method for forming a semiconductor device structure as claimed in claim 1 , wherein the first metal-containing layer and the second metal-containing layer are formed using an atomic layer deposition process.

6 . The method for forming a semiconductor device structure as claimed in claim 1 , wherein the first metal-containing layer and the second metal-containing layer comprises titanium nitride.

7 . The method for forming a semiconductor device structure as claimed in claim 1 , wherein the first metal-containing layer has a first average grain size, the second metal-containing layer has a second average grain size, and the first average grain size is greater than the second average grain size.

8 . The method for forming a semiconductor device structure as claimed in claim 1 , further comprising:

forming a dielectric fin structure over the substrate before the semiconductor nanostructures are formed, wherein the dielectric fin structure is beside the fin structure;

performing an etching back process to partially remove the first metal-containing layer, the metal oxide layer, and the second metal-containing layer so that top surfaces of the first metal-containing layer, the metal oxide layer, and the second metal-containing layer are lower than a top surface of the dielectric fin structure; and

forming a metal-containing cap over the top surfaces of the first metal-containing layer, the metal oxide layer, and the second metal-containing layer, wherein a top surface of the metal-containing cap is lower than the top surface of the dielectric fin structure.

9 . The method for forming a semiconductor device structure as claimed in claim 8 , further comprising:

forming a dielectric protective element over the metal-containing cap and the dielectric fin structure.

10 . The method for forming a semiconductor device structure as claimed in claim 1 , further comprising:

introducing oxygen-containing plasma on the second metal-containing layer to transform an upper portion of the second metal-containing layer into a second metal oxide layer; and

forming a third metal-containing layer over the second metal oxide layer.

11 . A method for forming a semiconductor device structure, comprising:

forming a fin structure over a substrate, wherein the fin structure has a plurality of sacrificial layers and a plurality of semiconductor layers laid out alternately;

removing the sacrificial layers to form a plurality of semiconductor nanostructures made up of remaining portions of the semiconductor layers;

forming a gate dielectric layer to wrap around the semiconductor nanostructures;

forming a first work function layer over the gate dielectric layer;

forming an oxygen-containing layer over the first work function layer, wherein the oxygen-containing layer is thinner than the first work function layer; and

forming a second work function layer over the oxygen-containing layer, wherein the oxygen-containing layer is thinner than the second work function layer.

12 . The method for forming a semiconductor device structure as claimed in claim 11 , further comprising:

introducing oxygen-containing plasma on the first work function layer to transform an upper portion of the first work function layer into the oxygen-containing layer.

13 . The method for forming a semiconductor device structure as claimed in claim 11 , wherein compositions of the first work function layer and the second work function layer are the same.

14 . The method for forming a semiconductor device structure as claimed in claim 11 , wherein the first work function layer has a first average grain size, the second work function layer has a second average grain size, and the first average grain size is greater than the second average grain size.

15 . The method for forming a semiconductor device structure as claimed in claim 11 , further comprising:

forming a dielectric protective element over top surfaces of the first work function layer, the oxygen-containing layer, and the second work function layer.

16 . A method for forming a semiconductor device structure, comprising:

forming a channel structure over a substrate;

forming a gate dielectric layer along a top and sidewalls of the channel structure;

forming a first metal-containing layer over the gate dielectric layer;

introducing oxygen into the first metal-containing layer to transform an upper portion of the first metal-containing layer into a metal oxide layer; and

forming a second metal-containing layer on the metal oxide layer, wherein the first metal-containing layer has a first average grain size, the second metal-containing layer has a second average grain size, and the first average grain size is greater than the second average grain size.

17 . The method for forming a semiconductor device structure as claimed in claim 16 , wherein each of the first metal-containing layer and the second metal-containing layer contains titanium.

18 . The method for forming a semiconductor device structure as claimed in claim 16 , further comprising:

introducing oxygen into the second metal-containing layer to transform an upper portion of the second metal-containing layer into a second metal oxide layer; and

forming a third metal-containing layer over the second metal oxide layer.

19 . The method for forming a semiconductor device structure as claimed in claim 16 , further comprising:

forming a dielectric protective element on top surfaces of the first metal-containing layer, the oxygen-containing layer, and the second metal-containing layer.

20 . The method for forming a semiconductor device structure as claimed in claim 16 , wherein the introducing oxygen into the first metal-containing layer is performed by introducing an oxygen-containing plasma on the first metal-containing layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2022
From: CHEN, CHIA-WEI; HUNG, JO-CHUN; LEE, CHIH-WEI; CHEN, HUI-CHI; TSAI, HSIN-HAN; LIAO, HSIANG-JU; LI, YI-LUN; HUNG, CHENG-LUNG; CHUI, CHI ON
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 059078/0478 →
Continuity (1)
Related Publication 20230268409A1 · Aug 24, 2023
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