Semiconductor device and manufacturing method of semiconductor device
A semiconductor device includes a gate stack with conductive layers and insulating layers that are stacked alternately with each other, a first channel pattern passing through the gate stack, a second channel pattern coupled to the first channel pattern, the second channel pattern protruding above a top surface of the gate stack, an insulating core formed in the first channel pattern, the insulating core extending into the second channel pattern, a gate liner with a first portion that surrounds a top surface of the gate stack and a second portion that surrounds a portion of a sidewall of the second channel pattern, and a barrier pattern coupled to the gate liner, the barrier pattern surrounding a remaining portion of the sidewall of the second channel pattern.
1 . A method of manufacturing a semiconductor device, the method comprising:
forming a stacked structure with first material layers and second material layers that are stacked alternately with each other;
forming a preliminary channel structure with a first channel pattern that passes through the stacked structure and an insulating core with a first portion that is located in the first channel pattern and a second portion that is coupled to the first portion, the second portion protruding above a top surface of the stacked structure;
forming a channel structure that surrounds the insulating core, the channel structure including a second channel pattern that is coupled to the first channel pattern;
etching a portion of a side of the channel structure, wherein a width of a middle portion of the channel structure is narrower than a width of a lower portion of the channel structure;
forming a gate liner with a first portion that covers the top surface of the stacked structure and a second portion that surrounds the second channel pattern;
forming a gap-filling insulating layer on the gate liner; and
forming an isolation insulating layer that passes through the gap-filling insulating layer and the first portion of the gate liner,
wherein the second portion of the gate liner includes a lower portion continuously connected to the first portion of the gate liner, a middle portion connected to the lower portion and an upper portion connected to the middle portion, a width of the lower portion of the second portion of the gate liner and the upper portion of the second portion of the gate liner is wider than a width of the middle portion of the second portion of the gate liner.
2 . The method of claim 1 , wherein the forming of the preliminary channel structure comprises:
forming a sacrificial structure on the stacked structure;
forming a first opening that passes through the sacrificial structure and the stacked structure;
forming a first channel layer in the first opening;
forming the insulating core in the first channel layer;
removing the sacrificial structure to expose the preliminary channel structure; and
forming the first channel pattern by etching the first channel layer.
3 . The method of claim 2 , wherein the forming of the insulating core comprises:
forming an insulating core layer in the first channel layer;
forming a second opening by etching a portion of the insulating core layer;
forming an insulating spacer in the second opening; and
forming a channel pad in the insulating spacer.
4 . The method of claim 1 , further comprising etching the second portion of the insulating core so that the second portion of the insulating core has a smaller width than the first portion of the insulating core.
5 . The method of claim 1 , further comprising forming a gate insulating liner that surrounds the top surface of the stacked structure and the second channel pattern before the forming of the gate liner.
6 . The method of claim 1 , wherein the forming of the isolation insulating layer comprises:
forming a trench that passes through the first portion of the gate liner, the trench exposing the second portion of the gate liner; and
forming the isolation insulating layer in the trench.
7 . The method of claim 1 , further comprising:
forming a third opening between the second channel pattern and the gap-filling insulating layer by etching the gate liner; and
forming a barrier pattern in the third opening.
8 . The method of claim 1 , further comprising replacing the first material layers with third material layers after the forming of the isolation insulating layer.
9 . A method of manufacturing a semiconductor device, the method comprising:
forming a stacked structure with first material layers and second material layers that are stacked alternately with each other;
forming a preliminary channel structure with a first channel pattern that passes through the stacked structure and an insulating core and a channel pad, the insulating core with a first portion that is located in the first channel pattern and a second portion that is coupled to the first portion, the second portion protruding above a top surface of the stacked structure, the channel pad located in the second portion of the insulating core;
forming a first recessed portion between the channel pad and the first portion of the insulating core by etching a sidewall of the second portion of the insulating core;
forming a second channel pattern with a second recessed portion corresponding to the first recessed portion, the second channel pattern coupled to the first channel pattern;
forming a gate insulating liner with a third recessed portion corresponding to the second recessed portion, the gate insulating liner extending the top surface of the stacked structure and a sidewall of the second channel pattern; and
forming a gate conductive liner with a fourth recessed portion corresponding to the third recessed portion, the gate conductive liner covering a surface of the gate insulating liner.