IP Library › Granted Patent US 12,477,960
Granted Patent B2
US 12,477,960 · App. 18/287,462 · Granted Nov 18, 2025

Memristor, method of calculating hamming distance, and in-memory computing integration application

Inventors: Guozhong Xing (Beijing, CN); Huai Lin (Beijing, CN); Zuheng Wu (Beijing, CN); Jiebin Niu (Beijing, CN); Zhihong Yao (Beijing, CN); Dashan Shang (Beijing, CN); Ling Li (Beijing, CN); Ming Liu (Beijing, CN)
Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
H10N70/20G11C13/0026G11C13/004G11C13/0069H10B63/30H10N70/841G11C2213/79
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Quick Facts
Patent No.
US 12,477,960
App. No.
18/287,462
Granted
Nov 18, 2025
Kind
B2
Abstract

The present disclosure provides a memristor, including a transistor and a resistive random access memory, where a drain electrode of the transistor is connected to a bottom electrode of the resistive random access memory; and the resistive random access memory includes: the bottom electrode, a resistive random access material layer, a current compliance layer and a top electrode from bottom to top, where the current compliance layer is configured to stabilize a fluctuation of a low resistance by reducing a surge current and optimizing a heat distribution, so as to improve a calculation accuracy of a Hamming distance.

Claims (15)

1 . A memristor, comprising a transistor and a resistive random access memory, wherein a drain electrode of the transistor is connected to a bottom electrode of the resistive random access memory; and the resistive random access memory comprises: the bottom electrode, a resistive random access material layer, a current compliance layer and a top electrode from bottom to top, wherein the current compliance layer is configured to stabilize a fluctuation of a low resistance by reducing a surge current and optimizing a heat distribution, so as to improve a calculation accuracy of a Hamming distance,

wherein the memristor further comprises:

a word line, a bit line and a source line; wherein the word line is connected to a gate electrode of the transistor to control a turn-on and a turn-off of the transistor, and the bit line and the source line are respectively connected to the top electrode of the resistive random access memory and a source electrode of the transistor, so as to control a writing, an operation and a reading of a memory cell,

wherein the transistor is turned on, a current pulse is injected from the bottom electrode in response to the bit line being grounded and a source voltage being greater than a threshold voltage of an erase current, so as to implement a switching of the resistive random access memory from a low resistance to a high resistance; otherwise, a current pulse is injected from the top electrode in response to the source line being grounded and a bit line voltage meeting a threshold voltage of a programming current, so as to implement a switching of the resistive random access memory from the high resistance to the low resistance.

2 . The memristor according to claim 1 , wherein each of the top electrode and the bottom electrode is made of one or any alloy of TiN, Ti, Pt, Ag, Au, Pd, Ru and W, and the resistive random access material layer is made of one of HfO x , TaO x , TiO x , ZrO 2 , Al 2 O 3 , NiO, ZnO and Ta 2 O 5 ; and the current compliance layer is made of one of SiO x , Al 2 O 3 , TiO x , TaO x and Ta 2 O 5 .

3 . The memristor according to claim 1 , wherein the transistor is turned on by applying a gate voltage and an initialization forming voltage is applied to the top electrode, so as to set the resistive random access memory in a programmable/erasable state.

4 . A method of calculating the Hamming distance using the memristor according to claim 1 , comprising:

initializing the memristor among a plurality of memristors into a high resistance state by an erase operation, wherein the plurality of memristors are arranged in a memory array;

encoding a first binary character string by using a word line and encoding a second binary character string by using a source line; and

encoding the first binary character string by using the source line and encoding the second binary character string by using the word line.

5 . The method of calculating the Hamming distance according to claim 4 , wherein in the step of encoding a first binary character string by using the word line and encoding a second binary character string by using the source line, an information “0” represents grounding, and an information “1” represents a high-level pulse; the transistor is turned on, and the bit line is at a high voltage level, and only a signal of the first binary character string equals 1 and the second binary character string equals 0 is configured to change a resistance state of the resistive random access memory, so as to implement a “not implication” Boolean logic operation on a corresponding bit between the first binary character string and the second binary character string that have a same length.

6 . The method of calculating the Hamming distance according to claim 4 , wherein in the step of encoding the first binary character string by using the source line and encoding the second binary character string by using the word line, an information “0” represents grounding, and an information “1” represents a high-level pulse; the transistor is turned on, and the bit line is at a high voltage level, and only a signal of the first binary character string=0 and the second binary character string=1 is configured to change a resistance state of the resistive random access memory, so as to implement a “not implication” Boolean logic operation on a corresponding bit between the second binary character string and the first binary character string that have a same length, so that an operation of the Hamming distance between the first binary character string and the second binary character string is implemented.

7 . The method of calculating the Hamming distance according to claim 4 , a Hamming distance calculating operation is performed on N-bit character string by using a memory cell of a column in the memory array; wherein a size of N depends on a switching ratio of a device and a fluctuation of a resistance value of the device.

8 . An in-memory computing integration application of the method of calculating the Hamming distance according to claim 4 , further comprising turning on a transistor to read, and comprising that:

a read voltage of 0.2V is provided between the source line and a read bit line during reading, and the read bit line controls the transistor to be turned on, so as to generate a read current; and the Hamming distance is read from a total current according to Kirchhoff's law.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2023
From: XING, GUOZHONG; LIN, HUAI; WU, ZUHENG; NIU, JIEBIN; YAO, ZHIHONG; SHANG, DASHAN; LI, LING; LIU, MING
To: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
Reel/Frame 065274/0720 →
Continuity (1)
Related Publication 20240224820A1 · Jul 4, 2024
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