IP Library › Granted Patent US 12,481,429
Granted Patent B2
US 12,481,429 · App. 17/824,638 · Granted Nov 25, 2025

Client and network based erasure code recovery

Inventor: Ronald C. Lee (Pleasanton, CA)
Assignee: Samsung Electronics Co., Ltd.
G06F3/0619G06F3/0658G06F3/067G06F11/1004
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Quick Facts
Patent No.
US 12,481,429
App. No.
17/824,638
Granted
Nov 25, 2025
Kind
B2
Abstract

A system and method for client and network based erasure code recovery. In some embodiments, the method includes: receiving, by a storage node, a get command; storing, by the storage node, in a memory of a host, using remote direct memory access, data specified by the get command, at a memory address specified by the get command; sending, by the storage node, a response, indicating successful execution of the get command; and performing, by the host, erasure code recovery based on the data.

Claims (47)

1 . A method, comprising:

receiving, by a storage node, a get command from a host, wherein the get command indicates a memory address in a memory of the host;

storing, by the storage node, in the memory of the host, using remote direct memory access, data specified by the get command, at the memory address specified by the get command, wherein the data includes a parity data;

based on storing by the storage node, in the memory of the host, the data including the parity data, transmitting by the storage node a response to the host, wherein the response includes the memory address storing the parity data; and

performing, by the host, erasure code recovery based on the data.

2 . The method of claim 1 , wherein the receiving of the get command comprises receiving the get command over a Transmission Control Protocol (TCP) socket.

3 . The method of claim 1 , wherein the storing of the data comprises storing the data using remote direct memory access over ethernet.

4 . The method of claim 1 , wherein the storing, by the storage node, of the data, comprises storing the data using Remote Direct Memory Access over Converged Ethernet (RoCE).

5 . The method of claim 1 , wherein the get command includes a first scatter gather list for a first block of data.

6 . The method of claim 1 , wherein the get command includes a first scatter gather list for a block of parity bits.

7 . The method of claim 1 , wherein:

the host comprises a Graphics Processing Unit (GPU), and

the performing of the erasure code recovery comprises performing erasure code recovery by the GPU.

8 . The method of claim 1 , wherein the performing of the erasure code recovery comprises:

storing parity data temporarily in a region of a shared parity memory pool, and

freeing the region of the shared parity memory pool upon completion of the erasure code recovery.

9 . A system, comprising:

a host comprising a processing circuit; and

a storage node comprising a processing circuit configured to:

receive a get command from the host, wherein the get command indicates a memory address in a memory of the host;

store, in the memory of the host, using remote direct memory access, data specified by the get command, at the memory address specified by the get command, wherein the data includes a parity data; and

based on storing of the data including the parity data in the memory of the host, transmit a response to the host, wherein the response includes the memory address storing the parity data,

wherein the processing circuit of the host is configured to perform erasure code recovery based on the data.

10 . The system of claim 9 , wherein the receiving of the get command comprises receiving the get command over a Transmission Control Protocol (TCP) socket.

11 . The system of claim 9 , wherein the processing circuit being configured to store the data comprises the processing circuit being configured to store the data using remote direct memory access over ethernet.

12 . The system of claim 9 , wherein the processing circuit being configured to store the data comprises the processing circuit being configured to store the data using Remote Direct Memory Access over Converged Ethernet (RoCE).

13 . The system of claim 9 , wherein the get command includes a first scatter gather list for a first block of data.

14 . The system of claim 9 , wherein the get command includes a first scatter gather list for a block of parity bits.

15 . The system of claim 9 , wherein:

the processing circuit of the host comprises a Graphics Processing Unit (GPU), and

the performing of the erasure code recovery comprises performing erasure code recovery by the GPU.

16 . The system of claim 9 , wherein the performing of the erasure code recovery comprises:

storing parity data temporarily in a region of a shared parity memory pool, and

freeing the region of the shared parity memory pool upon completion of the erasure code recovery.

17 . The system of claim 9 , wherein:

the host comprises a Network Interface Card (NIC); and

the performing of the erasure code recovery comprises performing erasure code recovery by the NIC.

18 . A system, comprising:

a host comprising means for processing; and

a storage node comprising means for processing configured to:

receive a get command from a host, wherein the get command indicates a memory address in a memory of the host;

store, in the memory of the host, using remote direct memory access, data specified by the get command, at the memory address specified by the get command, wherein the data includes a parity data; and

based on storing of the data including the parity data in the memory of the host, transmit a response to the host, wherein the response includes the memory address storing the parity data,

wherein the means for processing of the host is configured to perform erasure code recovery based on the data.

19 . The system of claim 18 , wherein:

the host comprises a Network Interface Card (NIC); and

the performing of the erasure code recovery comprises performing erasure code recovery, by the NIC.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2024
From: LEE, RONALD C.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 066071/0919 →
Continuity (2)
Provisional Application 63323009 · Mar 23, 2022
Related Publication 20230305713A1 · Sep 28, 2023
References Cited (30)
US 5384786A · Dudley et al. · 1995 [cited by applicant]
US 5479656A · Rawlings · 1995 [cited by applicant]
US 8290059B2 · Kang et al. · 2012 [cited by applicant]
US 8839073B2 · Cohen · 2014 [cited by applicant]
US 9372870B1 · Levy · 2016 [cited by applicant]
US 9417955B2 · Patterson et al. · 2016 [cited by applicant]
US 9495241B2 · Flynn et al. · 2016 [cited by applicant]
US 10310810B2 · Fukuchi · 2019 [cited by applicant]
US 10466906B2 · Benisty · 2019 [cited by applicant]
US 10691539B2 · Zamir et al. · 2020 [cited by applicant]
US 10838811B1 · Kuo · 2020 [cited by applicant]
US 10846017B2 · Agarwal · 2020 [cited by applicant]
US 10897273B2 · Lamberts et al. · 2021 [cited by applicant]
US 10983964B1 · Bono et al. · 2021 [cited by applicant]
US 11171666B2 · Nowoczynski · 2021 [cited by applicant]
US 11200168B2 · Johns · 2021 [cited by applicant]
US 11210002B2 · Pitchumani et al. · 2021 [cited by applicant]
US 11500719B1 · Srinivasan · 2022 [cited by examiner]
US 11740804B1 · Gordon · 2023 [cited by examiner]
US 20160342545A1 · Arai et al. · 2016 [cited by applicant]
US 20180026655A1 · Gopal et al. · 2018 [cited by applicant]
US 20180048732A1 · Zhu · 2018 [cited by examiner]
US 20180341549A1 · Bolkhovitin et al. · 2018 [cited by applicant]
US 20190050289A1 · Kachare et al. · 2019 [cited by applicant]
US 20200014688A1 · Kohli · 2020 [cited by examiner]
US 20200042386A1 · Pruett · 2020 [cited by examiner]
US 20200319812A1 · He et al. · 2020 [cited by applicant]
US 20200348958A1 · Krasner · 2020 [cited by examiner]
US 20230259284A1 · Han · 2023 [cited by examiner]
EPO Extended Search Report dated Jul. 14, 2023, issued in corresponding European Patent Application No. 23160767.2 (7 pages). [cited by applicant]