Method of manufacturing semiconductor devices and semiconductor devices
View Patent ↗In a method of manufacturing a semiconductor device, a conductive pattern is formed in a surface region of a dielectric layer, a mask pattern including an opening over the conductive pattern is formed over the dielectric layer, a part of the conductive pattern is converted into a high-resistant part having a higher resistivity than the conductive pattern before the converting through the opening, and the mask pattern is removed.
1 . A method of manufacturing a semiconductor device, comprising:
forming a conductive pattern having a first resistivity in a first main surface of a dielectric layer,
wherein the dielectric layer includes one or more of silicon oxide, SiON, SiOCN, SiCN, SiOC, silicon nitride, and an organic material, and
the conductive pattern has a first main surface coplanar to the first main surface of the dielectric layer,
forming a mask pattern over the first main surface of the dielectric layer, the mask pattern including an opening over the first main surface of the conductive pattern;
converting a part of the conductive pattern into a high-resistance part having a second resistivity higher than the first resistivity;
removing the mask pattern;
forming a first conductive via in contact with and on a conductive part of the first main surface of the conductive pattern; and
forming a second conductive via in contact with and on the high-resistance part,
wherein a portion of the second conductive via contacting the high-resistance part is electrically conductive.
2 . The method of claim 1 , wherein the conductive pattern is made of Ru, W or a silicide.
3 . The method of claim 2 , wherein the part of the conductive pattern is converted to an oxide.
4 . The method of claim 2 , wherein the part of the conductive pattern is converted to an oxide by plasma oxidization.
5 . The method of claim 4 , wherein the mask pattern is at least partially oxidized or ashed.
6 . The method of claim 2 , wherein an upper portion of the part of the conductive pattern is converted to the second resistivity and a lower portion of the part of the conductive pattern remains at the first resistivity.
7 . The method of claim 2 , wherein the part of the conductive pattern is converted to the second resistivity from an upper surface to a bottom surface.
8 . The method of claim 7 , wherein an adjacent part of the conductive pattern adjacent to the part of the conductive pattern that is converted to the second resistivity remains at the first resistivity.
9 . The method of claim 8 , wherein a resistivity of the high-resistance part is 4 times or more the first resistivity.
10 . The method of claim 2 , wherein an entirety of the conductive pattern is converted to the high-resistance part.
11 . A method of manufacturing a semiconductor device, comprising:
forming a conductive pattern having a main surface in a trench formed in a main surface of a dielectric layer,
wherein the dielectric layer includes one or more of silicon oxide, SiON, SiOCN, SiCN, SiOC, silicon nitride, and an organic material;
forming a mask pattern over the main surface of the dielectric layer, the mask pattern including an opening over the main surface of the conductive pattern;
converting a part of the conductive pattern through the opening into a high-resistance part having a higher resistivity than the conductive pattern before the converting through the opening;
removing the mask pattern;
forming a first via in contact with and on a conductive part of the main surface of the conductive pattern; and
forming a second via in contact with and on the high-resistance part,
wherein a portion of the second via contacting the high-resistance part is electrically conductive.
12 . The method of claim 11 , wherein the conductive pattern is made of Ru or W.
13 . The method of claim 12 , wherein the part of the conductive pattern is converted to an oxide by plasma oxidization.
14 . The method of claim 13 , wherein:
the mask pattern includes TiN, and
the mask pattern is at least partially oxidized.
15 . The method of claim 11 , wherein an upper portion of the part of the conductive pattern is converted to a high-resistance and a lower portion of the part of the conductive pattern remains at a same resistivity as before the converting a part.
16 . The method of claim 11 , wherein a thickness of the conductive pattern is in a range from 20 nm to 80 nm.
17 . A method of manufacturing a semiconductor device, comprising:
forming an interlayer dielectric layer having a main surface over a substrate,
wherein the interlayer dielectric layer includes one or more of silicon oxide, SiON, SiOCN, SiCN, SiOC, silicon nitride, and an organic material;
forming a wiring pattern having a main surface in the main surface of the interlayer dielectric layer,
wherein the main surface of the wiring pattern and the main surface of the interlayer dielectric layer are coplanar;
forming a hard mask layer over the main surface of the wiring pattern;
patterning the hard mask layer to form an opening exposing a region of the main surface of the wiring pattern;
increasing a resistance of a portion of the exposed region of the main surface of the wiring pattern,
wherein another portion of the wiring pattern remains at a same resistivity as before the increasing a resistance of a portion of the exposed region of the wiring pattern;
removing remaining portions of the hard mask layer;
forming a first via in contact with and on the increased resistance portion of the wiring pattern and
forming a second via in contact with and on a main surface of the another portion of the wiring pattern,
wherein a portion of the first via contacting the increased resistance portion is electrically conductive.
18 . The method of claim 17 , wherein the increasing a resistance of a portion of the exposed region of the wiring pattern includes oxidizing the portion of the exposed region.
19 . The method of claim 17 , wherein the wiring pattern includes Ru.
20 . The method of claim 17 , wherein the hard mask layer includes TiN.