Display device and method of manufacturing the same
A method for manufacturing a display device includes: forming a first active pattern in a display area; forming a first insulation layer covering the first active pattern; forming a first gate metal pattern including a first gate electrode overlapping the first active pattern; forming a second insulation layer covering the first gate metal pattern; forming a second gate metal pattern overlapping the first gate metal pattern; forming a third insulation layer covering the second gate metal pattern; forming a second active pattern on the third insulation layer; forming a third gate metal pattern including: a second gate electrode overlapping the second active pattern; and a bridge pattern, the bridge pattern being disposed in a peripheral area surrounding the display area; forming a fourth insulation layer covering the third gate metal pattern; and forming a source metal pattern disposed on the fourth insulation layer, the source metal pattern including: a first power wiring pattern; and a second power wiring pattern spaced apart from the first power wiring pattern, wherein the first power wiring pattern and the second power wiring pattern are disposed in the peripheral area contacting the bridge pattern.
1 . A method for manufacturing a display device, the method comprising:
forming a first active pattern in a display area;
forming a first insulation layer covering the first active pattern;
forming a first gate metal pattern comprising a first gate electrode overlapping the first active pattern;
forming a second insulation layer covering the first gate metal pattern;
forming a second gate metal pattern overlapping the first gate metal pattern;
forming a third insulation layer covering the second gate metal pattern;
forming a second active pattern on the third insulation layer;
forming a third gate metal pattern comprising:
a second gate electrode overlapping the second active pattern; and
a bridge pattern, the bridge pattern being disposed in a peripheral area surrounding the display area;
forming a fourth insulation layer covering the third gate metal pattern; and
forming a source metal pattern disposed on the fourth insulation layer, the source metal pattern comprising:
a first power wiring pattern; and
a second power wiring pattern spaced apart from the first power wiring pattern;
forming a fifth insulation layer covering the source metal pattern;
forming a pixel-defining layer disposed on the fifth insulation layer, wherein
the first power wiring pattern and the second power wiring pattern are disposed in the peripheral area and are electrically connected to each other via the bridge pattern, and
the fifth insulation layer and the pixel-defining layer are partially removed in the peripheral area to form an organic layer-removed area, the organic layer-removed area extending across a center between the first power wiring pattern and the second power wiring pattern, the center being equal distant between the first power wiring pattern and the second power wiring pattern.
2 . The method of claim 1 , further comprising:
forming a light-emitting element on the fifth insulation layer and the pixel-defining layer.
3 . The method of claim 2 , wherein remaining portions of the fifth insulation layer and the pixel-defining layer after forming the organic layer-removed area comprises a dam structure extending along the peripheral area.
4 . The method of claim 2 , wherein the center of the organic layer-removed area overlaps the bridge pattern.
5 . The method of claim 2 , wherein the first gate metal pattern further comprises a first fan-out line overlapping the bridge pattern.
6 . The method of claim 5 , wherein the second gate metal pattern further comprises a second fan-out line extending in parallel with the first fan-out line and overlapping the bridge pattern.
7 . The method of claim 1 , wherein
the first active pattern comprises silicon, and
the second active pattern comprises oxide semiconductor.
8 . The method of claim 1 , wherein a contact area of the bridge pattern and the first power wiring pattern extends along the first power wiring pattern.
9 . The method of claim 2 , wherein the organic layer-removed area extends across a majority of a distance between the first power wiring pattern and the second power wiring pattern.