IP Library › Granted Patent US 12,506,407
Granted Patent B2
US 12,506,407 · App. 18/349,301 · Granted Dec 23, 2025

Digitally-controlled DC-DC converter

Inventors: Fabien Boitard (Mouans Sartoux, FR); Ludovic Oddoart (Opio, FR); Christian Vincent Sorace (Falicon, FR)
Assignee: NXP B.V.
H02M3/157H02M1/088H02M3/158
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Quick Facts
Patent No.
US 12,506,407
App. No.
18/349,301
Granted
Dec 23, 2025
Kind
B2
Abstract

A digitally controlled DC-DC converter has a power stage coupled to an input voltage and to a control signal to generate an output voltage in response to the control signal. A controller generates the control signal and has an adjustment block to compare the output voltage to a reference voltage to generate a comparison signal, a logic circuit coupled to the adjustment block to receive the comparison signal and to generate the control signal in response to the comparison signal using a control word, and a digital-to analog converter coupled to the adjustment block, the power stage input voltage and the logic circuit to receive the control word from the logic circuit and to generate a converter voltage representing the control word using another voltage, the converter voltage being applied to the adjustment block to adjust the comparison signal.

Claims (45)

1 . A power converter comprising:

a power stage coupled to an input voltage and to a control signal and configured to generate an output voltage in response to the control signal; and

a controller to generate the control signal, coupled to the power stage to provide the control signal to the power stage, the controller having:

an adjustment block coupled to the power stage output voltage to compare the output voltage to a reference voltage to generate a comparison signal;

a logic circuit coupled to the adjustment block to receive the comparison signal and to generate the control signal in response to the comparison signal using a control word; and

a digital-to analog converter coupled to the adjustment block, the power stage input voltage and the logic circuit to receive the control word from the logic circuit and to generate a converter voltage representing the control word using another voltage, the converter voltage being applied to the adjustment block to adjust the comparison signal.

2 . The power converter of claim 1 , wherein the another voltage is the input voltage to the power stage.

3 . The power converter of claim 2 , wherein the adjustment block comprises:

an error amplifier coupled to the output voltage and to the reference voltage to generate an error voltage that represents a difference between the output voltage and the reference voltage; and

a comparator coupled to the error amplifier and the logic circuit to receive the error voltage and the converter voltage and to generate the comparison signal in response to comparing the error voltage and the converter voltage.

4 . The power converter of claim 1 , wherein the another voltage is an error voltage related to a difference between the output voltage and the reference voltage.

5 . The power converter of claim 4 , wherein the adjustment block comprises:

an error amplifier coupled to the output voltage and to the reference voltage to generate an error voltage that represents a difference between the output voltage and the reference voltage; and

a comparator coupled to the error amplifier and the logic circuit to receive the input voltage and the converter voltage and to generate the comparison signal in response to comparing the input voltage and the converter voltage.

6 . The power converter of claim 1 , wherein the control word represents a duty cycle of the control signal using a number of bits and wherein the converter voltage scales the another voltage based on the duty cycle.

7 . The power converter of claim 1 , wherein the control word represents a ratio of the output voltage to the input voltage.

8 . The power converter of claim 1 , wherein the logic circuit generates the control word using an up and down counter and wherein the up and down counter counts in response to the comparison signal.

9 . The power converter of claim 1 , wherein the logic circuit is coupled to a clock signal having a clock frequency and wherein the control signal is a pulse width modulation signal having a switching cycle determined by the clock frequency.

10 . The power converter of claim 9 , wherein the logic circuit adjusts the control word at each switching cycle.

11 . The power converter of claim 1 , wherein the power stage comprises switches between the input voltage and the output voltage and wherein the power stage opens and closes the switches in response to the control signal.

12 . The power converter of claim 11 , wherein the power stage switches are coupled in series with the control signal coupled to the gates of the switches and with the output voltage at a common drain of the switches.

13 . The power converter of claim 1 , wherein the power converter comprises a direct current to direct current buck converter.

14 . A method of operating a power converter, the power converter comprising an input, an output, a controller, and a power stage coupled between the input and the output, the method comprising:

receiving an input voltage at the power stage input;

generating an output voltage at the power stage output in response to a control signal;

comparing the output voltage to a reference voltage;

generating a comparison signal in response to the comparing;

generating the control signal in the controller in response to the comparison signal using a control word; and

generating a converter voltage representing the control word in a digital-to-analog converter using another voltage, wherein the converter voltage is applied to adjust the comparison signal.

15 . The method of claim 14 , wherein generating a comparison signal comprises:

generating an error voltage that represents a difference between the output voltage and the reference voltage;

generating the converter voltage by factoring the input voltage by the control word; and

generating the comparison signal in response to comparing the error voltage and the converter voltage.

16 . The method of claim 14 , wherein generating a comparison signal comprises:

generating an error voltage that represents a difference between the output voltage and the reference voltage;

generating the converter voltage by factoring the error voltage by the control word; and

generating the comparison signal in response to comparing the converter voltage and the input voltage.

17 . The method of claim 14 , further comprising generating the control word using an up and down counter, wherein the up and down counter counts in response to the comparison signal.

18 . The method of claim 14 , further comprising receiving a clock signal having a clock frequency and wherein generating the control signal comprises generating a pulse width modulation signal having a switching cycle determined by the clock frequency.

19 . A power converter comprising:

means for generating an output voltage using an input voltage in response to a control signal;

means for comparing the output voltage to a reference voltage and generating a comparison signal in response to the comparing;

means for generating the control signal in response to the comparison signal using a control word; and

means for converting the control word from digital to analog to generate the converter voltage, wherein the converter voltage is applied to adjust the comparison signal.

20 . The power converter of claim 19 , wherein the means for generating the control word comprises an up and down counter, wherein the up and down counter counts in response to the comparison signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2023
From: BOITARD, FABIEN; ODDOART, LUDOVIC; SORACE, CHRISTIAN VINCENT
To: NXP B.V.
Reel/Frame 064196/0881 →
Priority Claims (1)
EP 22306168 · Aug 2, 2022 · regional
Continuity (1)
Related Publication 20240048050A1 · Feb 8, 2024
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