IP Library Granted Patent US 12,525,541
Granted Patent B2
US 12,525,541 · App. 17/926,355 · Granted Jan 13, 2026

Power converter assembly

Inventors: Yasser A.A. Nour (Kongens Lyngby, DK); Hoà Lê Thanh (Kongens Lyngby, DK); Ahmed Morsi Ammar (Kongens Lyngby, DK); Dennis Øland Larsen (Kongens Lyngby, DK); Pere Llimós Muntal (Kongens Lyngby, DK)
Assignee: DANMARKS TEKNISKE UNIVERSITET
H01L23/5384H01L23/053H01L23/49811H01L25/165H02M3/003H01L24/16H01L2224/16225
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,525,541
App. No.
17/926,355
Granted
Jan 13, 2026
Kind
B2
Abstract

A power converter assembly includes an interposer; an integrated circuit, such as a power management integrated circuit, arranged in a cavity or pocket of the interposer or monolithically integrated in the interposer; one or more electrical components stacked on a top side of the interposer; and one or more vias arranged in the interposer forming electrical connections in the interposer, wherein the integrated circuit and the electrical components are configured to perform a power conversion of an input voltage to an output voltage.

Claims (25)

1 . A power converter assembly comprising:

an interposer;

an integrated circuit, such as a power management integrated circuit, arranged in a cavity or pocket of the interposer or monolithically integrated in the interposer;

one or more electrical components stacked on a top side of the interposer;

one or more vias arranged in the interposer; and

top-side pads connected to the one or more electrical components stacked on the top side of the interposer,

wherein the integrated circuit and the electrical components are configured to perform a power conversion of an input voltage to an output voltage, and

wherein each of the top-side pads is connected to one or more bottom-side pads through a plurality of parallel through-interposer-vias.

2 . The power converter assembly according to claim 1 , wherein the electrical components comprise passive electrical components and/or active electrical components stacked on the top side of the interposer.

3 . The power converter assembly according claim 2 , further comprising a printed circuit board, wherein the interposer assembly is mounted on the printed circuit board, wherein a first one of the plurality of parallel through-interposer-vias form electrical connections between the passive electrical components and routing on the printed circuit board, and wherein the routing on the printed circuit board is further connected to the integrated circuit from a bottom side of the interposer.

4 . The power converter assembly according to claim 1 , wherein the plurality of parallel through-interposer-vias are through-silicon-vias.

5 . The power converter assembly according to claim 4 , wherein the plurality of parallel through-interposer-vias have a diameter between 10 μm and 100 μm.

6 . The power converter assembly according to claim 1 , wherein the plurality of parallel through-interposer-vias comprise an electrical insulation layer towards the interposer, wherein the electrical insulation layer is atomic-layer-deposition aluminum oxide (ALD-AL 2 O 3 ).

7 . The power converter assembly according to claim 4 , wherein the plurality of parallel through-interposer-vias are configured for carrying high electrical current of the power converter assembly.

8 . The power converter assembly according to claim 1 , wherein a second one of the plurality of through-interposer-vias forms a connection from a bottom side of the interposer to the integrated circuit.

9 . The power converter assembly according to claim 1 , wherein a third one of the plurality of through-interposer-vias forms a connection from the top side of the interposer to the integrated circuit.

10 . The power converter assembly according to claim 1 , further comprising a micro controller arranged on the top side of the interposer, the power converter assembly further comprising a load and/or an integrated application of the power converter arranged on the top side of the interposer.

11 . The power converter assembly according to claim 1 , further comprising routing layers on both sides of the interposer, the routing layers comprising conductive traces.

12 . The power converter assembly according to claim 11 , further comprising insulation layers on both sides of the interposer between the interposer and the routing layers to prevent electrical connection between the interposer and the routing layers.

13 . The power converter assembly according to claim 1 , further comprising a power management integrated circuit stacked on the interposer, wherein the integrated circuit constitutes a load of the power converter assembly.

14 . The power converter assembly according to claim 1 , wherein the interposer is made of silicon.

15 . The power converter assembly according to claim 1 , wherein the interposer comprises a lid on a bottom side of the interposer for closing the cavity, thereby encapsulating the integrated circuit in the interposer.

16 . The power converter assembly according to claim 1 , wherein the integrated circuit is a power management integrated circuit, wherein the power management integrated circuit is configured to perform voltage regulation and/or voltage scaling using the one or more passive electrical components.

17 . The power converter assembly according to claim 1 , wherein the power converter assembly is a DC-DC power converter assembly or wherein the power converter assembly is a DC-DC power converter assembly and the DC-DC power converter has multiple input voltage levels and multiple output voltage levels and wherein the power management integrated circuit is configured to manage a number of power conversion rates between the input voltage levels and output voltage levels.

18 . The power converter assembly according to claim 1 , wherein the one or more passive electrical components comprise two GaN field-effect transistors, and wherein power converter assembly is a GaN half-bridge power stage and wherein the integrated circuit is a gate driver integrated circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2022
From: NOUR, YASSER A.A.; THANH, HOÀ LÊ; AMMAR, AHMED MORSI; LARSEN, DENNIS ØLAND; LLIMÓS MUNTAL, PERE
To: DANMARKS TEKNISKE UNIVERSITET
Reel/Frame 061825/0723 →
Priority Claims (1)
EP 20176041 · May 22, 2020 · regional
Continuity (1)
Related Publication 20230197624A1 · Jun 22, 2023
References Cited (19)
US 9740079B1 · Davids · 2017 [cited by examiner]
US 9761547B1 · Kunkee · 2017 [cited by examiner]
US 20130076322A1 · Tateno · 2013 [cited by examiner]
US 20150179610A1 · Khan · 2015 [cited by examiner]
US 20160113117A1 · Liu · 2016 [cited by examiner]
US 20170236809A1 · Trimberger · 2017 [cited by examiner]
US 20170331371A1 · Parto · 2017 [cited by applicant]
US 20220093526A1 · Wu · 2022 [cited by examiner]
US 20220278021A1 · Nootens · 2022 [cited by examiner]
WO 2011103259A2 · 2011 [cited by applicant]
WO 2016073959A1 · 2016 [cited by applicant]
WO 2019155056A1 · 2019 [cited by applicant]
Chui K et al: “High Aspect Ratio (10:1) Via-Middle TSV with High-k Dielectric Liner Oxide”, 2019 IEEE 21st Electronics Packaging Technology Conference (EPTC), IEEE, Dec. 4, 2019 (Dec. 4, 2019), pp. 721-724, XP033732058,… [cited by examiner]
Chui K et al.: “High Aspect Ration (>10:1) Via-Middle TSV with high-k Dielectric Liner Oxide”, 2019 IEEE 21st Electronics Packaging Technology Conference (EPTC), IEEE, pp. 721-724,DIO:10.1109/EPTC47984.2019.9026683, Dec… [cited by applicant]
Ding et al.: “A Power Inductor Integration Technology Using a Silicon Interposer for DC-DC Converter Applications”, Proceedings of the 30th International Symposium in Power Semiconductor Devices & ICs, May 13-17, 2018. [cited by applicant]
Mingliang Wang: “Integrated power inductors in silicon for compact dc-dc converters in portable electronics”, Dissertation from The University of Florida, 2010. [cited by applicant]
O'Mathuna Cian: PwrSiP Power Supply in Package Power System in Package, 2016 International Symposium on 3D Power Electronics Integration and Manufacturing (3D-PEIM), IEEE, DOI: 10.1109/3DPEIM.2016.7570569, Jun. 13, 2016. [cited by applicant]
Sridhar et al.: “Exploration of Inductor-Based Hybrid Integrated Voltage Regulator Architectures”, 2016 6th Electronic System-integration Technology Conference (ESTC), IEEE, pp. 1-6, DOI:10.1019/ESTC.2016.7764679, Sep. … [cited by applicant]
Sun et al.: “Development of GaN Power IC Platform and A11 GaN DC-DC Buck Converter IS”, 2019 31st International Symposium on Power Semiconductor Devices and ICS (ISPSD), IEEE, pp. 271-274DOI: 10.1109/ISPSD.2019.8757674,… [cited by applicant]