Memory device with reduced threshold voltage
Semiconductor devices and methods for forming the semiconductor devices are described. A semiconductor device can include a first electrode, a storage node, a second electrode and a film layer. The storage node can include phase change material deposited on top of the first electrode. The film layer can be deposited on top of the storage node and connected in a closed circuit. A voltage difference among the first electrode, the second electrode and the film layer can dictate a threshold voltage that triggers a phase change of the phase change material. An amorphous volume in the storage node can be dependent on a structural arrangement of the first electrode, the second electrode and the film layer with respect to the storage node.
1 . A semiconductor device comprising:
a first electrode;
a storage node including phase change material deposited on top of the first electrode;
a second electrode; and
a film layer deposited on top of the storage node and connected in a closed circuit, wherein:
a voltage difference among the first electrode, the second electrode and the film layer dictates a threshold voltage that triggers a phase change of the phase change material; and
an amorphous volume in the storage node is dependent on a structural arrangement of the first electrode, the second electrode and the film layer with respect to the storage node.
2 . The semiconductor device of claim 1 , wherein in response to the phase change, an electric field is created in the storage node, a direction of the electric field is dependent on the structural arrangements of the first electrode, the second electrode and the film layer with respect to the storage node, and the amorphous volume is further dependent on the electric field.
3 . The semiconductor device of claim 1 , wherein the first electrode comprises a heating element configured to heat the phase change material in the storage node.
4 . The semiconductor device of claim 1 , wherein the film layer is composed of metal nitride.
5 . The semiconductor device of claim 1 , wherein:
an electrical resistance of the film layer is less than an electrical resistance of an amorphous phase of the storage node; and
the electrical resistance of the film layer is greater than an electrical resistance of a crystalline phase of the storage node.
6 . The semiconductor device of claim 1 , further comprising a projection layer positioned between the first electrode and the storage node.
7 . The semiconductor device of claim 6 , wherein:
an electrical resistance of the film layer is less than an electrical resistance of an amorphous phase of the storage node;
the electrical resistance of the film layer is greater than an electrical resistance of the projection layer;
the electrical resistance of the film layer is greater than an electrical resistance of a crystalline phase of the storage node; and
the electrical resistance of the projection layer is greater than the electrical resistance of the crystalline phase of the storage node.
8 . The semiconductor device of claim 6 , wherein a sheet resistance of the film layer is greater than a sheet resistance of the projection layer.
9 . A memory device comprising:
a plurality of memory elements, each memory element among the plurality of memory elements comprises a memory cell, and the memory cell comprises:
a first electrode;
a storage node including phase change material deposited on top of the first electrode;
a second electrode; and
a film layer deposited on top of the storage node and connected in a closed circuit, wherein:
a voltage difference among the first electrode, the second electrode and the film layer dictates a threshold voltage that triggers a phase change of the phase change material; and
an amorphous volume in the storage node is dependent on a structural arrangement of the first electrode, the second electrode and the film layer with respect to the storage node.
10 . The memory device of claim 9 , wherein in response to the phase change, an electric field is created in the storage node, a direction of the electric field is dependent on the structural arrangements of the first electrode, the second electrode and the film layer with respect to the storage node, and the amorphous volume is further dependent on the electric field.
11 . The memory device of claim 9 , further comprising a selector node connected to the first electrode, wherein the selector node comprises:
a third electrode;
a fourth electrode;
a layer of chalcogenides deposited on top of the fourth electrode, wherein the layer of chalcogenides is bounded by the third electrode and the fourth electrode; and
another film layer deposited on top of the layer of chalcogenides.
12 . The memory device of claim 9 , wherein the film layer is composed of metal nitride.
13 . The memory device of claim 9 , wherein:
an electrical resistance of the film layer is less than an electrical resistance of an amorphous phase of the storage node; and
the electrical resistance of the film layer is greater than an electrical resistance of a crystalline phase of the storage node.
14 . The memory device of claim 9 , wherein the memory cell further comprises a projection layer between the first electrode and the storage node.
15 . The memory device of claim 14 , wherein:
an electrical resistance of the film layer is less than an electrical resistance of an amorphous phase of the storage node;
the electrical resistance of the film layer is greater than an electrical resistance of the projection layer;
the electrical resistance of the film layer is greater than an electrical resistance of a crystalline phase of the storage node; and
the electrical resistance of the projection layer is greater than the electrical resistance of the crystalline phase of the storage node.
16 . The memory device of claim 14 , wherein a sheet resistance of the film layer is greater than a sheet resistance of the projection layer.
17 . A method comprising:
forming a first electrode;
depositing a layer of phase change material;
depositing a film layer;
forming a second electrode;
connecting the first electrode and the second electrode to a voltage source; and
connecting the film layer to a closed circuit to define a threshold voltage that triggers a phase change of the phase change material.
18 . The method of claim 17 , further comprising depositing a projection layer subsequent to forming the first electrode and prior to depositing the layer of phase change material.
19 . The method of claim 17 , wherein the film layer is composed of metal nitride.
20 . The method of claim 17 , further comprising depositing a dielectric layer on top of the second electrode.