IP Library › Granted Patent US 12,538,535
Granted Patent B2
US 12,538,535 · App. 18/159,407 · Granted Jan 27, 2026

Semiconductor device having semiconductor regions of alternating conductivity types, one of which has a peak in impurity concentration located between gate electrodes of the semiconductor device

Inventors: Yoko Iwakaji (Tokyo, JP); Tomoko Matsudai (Tokyo, JP); Hiroko Itokazu (Kawasaki Kanagawa, JP)
Assignees: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation
H10D62/127H10D12/481H10D62/60H10D64/513
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Quick Facts
Patent No.
US 12,538,535
App. No.
18/159,407
Granted
Jan 27, 2026
Kind
B2
Abstract

According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a semiconductor member, and an insulating member. The semiconductor member includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a fourth semiconductor region of the first conductivity type, a fifth semiconductor region of the second conductivity type, and a sixth semiconductor region of the second conductivity type. The fifth semiconductor region includes a fourth partial region and a fifth partial region. The fourth partial region is located between the first partial region and the third electrode in a first direction. The fifth partial region is located between the third partial region and the fourth semiconductor region in the first direction.

Claims (67)

1 . A semiconductor device, comprising:

a collector electrode;

an emitter electrode, a direction from the collector electrode to the emitter electrode being along a first direction;

a plurality of gate electrodes being located between the collector electrode and the emitter electrode;

a semiconductor member, the semiconductor member including:

a first semiconductor region of a first conductivity type, the first semiconductor region including a first partial region, a second partial region, and a third partial region, the first partial region being between the collector electrode and the gate electrodes in the first direction, a second direction from the first partial region to the second partial region being perpendicular to the first direction, the third partial region being between the second partial region and the emitter electrode in the first direction,

a second semiconductor region of a second conductivity type, the second semiconductor region being provided between the third partial region and the emitter electrode, the second semiconductor region including a first semiconductor portion,

a third semiconductor region of the first conductivity type, the third semiconductor region being provided between the first semiconductor portion and the emitter electrode, and being electrically connected to the emitter electrode;

a fourth semiconductor region of the first conductivity type, the fourth semiconductor region being provided between the third partial region and the second semiconductor region in the first direction,

a fifth semiconductor region of the second conductivity type, the fifth semiconductor region including a fourth partial region and a fifth partial region, the fourth partial region being located between the first partial region and the gate electrodes in the first direction, the fifth partial region being located between the third partial region and the fourth semiconductor region in the first direction, the fifth partial region being continuous with the fourth partial region, and

a sixth semiconductor region of the second conductivity type, the sixth semiconductor region being provided between the collector electrode and the first semiconductor region; and

an insulating member including a first insulating region, the first insulating region being provided between the semiconductor member and each of the gate electrodes,

wherein the gate electrodes are aligned in the second direction,

wherein the second semiconductor region, the fourth semiconductor region, and the fifth partial region are located between the gate electrodes in the second direction, and

wherein the fifth partial region has a peak of impurity concentration of the second conductivity type in the first direction, the peak being located between the gate electrodes in the second direction.

2 . The semiconductor device according to claim 1 , wherein

the semiconductor member includes a first boundary and a second boundary,

the first boundary being located between the first partial region and the fourth partial region in the first direction,

the second boundary being located between the third partial region and the fifth partial region in the first direction, and

a first distance between the collector electrode and the first boundary along the first direction being shorter than a second distance between the collector electrode and the second boundary along the first direction.

3 . The semiconductor device according to claim 2 , wherein an impurity concentration of the second conductivity type in at least a part of the fourth partial region is higher than an impurity concentration of the second conductivity type in at least a part of the fifth partial region.

4 . A device, comprising:

a collector electrode;

an emitter electrode, a direction from the collector electrode to the emitter electrode being along a first direction;

a plurality of gate electrodes being located between the collector electrode and the emitter electrode;

a semiconductor member, the semiconductor member including:

a first semiconductor region of a first conductivity type, the first semiconductor region including a first partial region, a second partial region, and a third partial region, the first partial region being located between the collector electrode and the gate electrodes in the first direction, a second direction from the first partial region to the second partial region crossing the first direction, the third partial region being located between the second partial region and the emitter electrode in the first direction,

a second semiconductor region of a second conductivity type, the second semiconductor region being provided between the third partial region and the emitter electrode, the second semiconductor region including a first semiconductor portion,

a third semiconductor region of the first conductivity type, the third semiconductor region being provided between the first semiconductor portion and the emitter electrode, and being electrically connected to the emitter electrode,

a fourth semiconductor region of the first conductivity type, the fourth semiconductor region being provided between the third partial region and the second semiconductor region in the first direction,

a fifth semiconductor region of the second conductivity type, the fifth semiconductor region includes a fourth partial region and a fifth partial region, the fourth partial region being located between the collector electrode and the gate electrodes in the first direction, the fifth partial region being located between the third semiconductor region and the fourth semiconductor region in the first direction, a direction from a part of the gate electrodes to the fifth partial region being along the second direction, an impurity concentration of the second conductivity type in at least a part of the fourth partial region being higher than an impurity concentration of the second conductivity type in at least a part of the fifth partial region, and

a sixth semiconductor region of the second conductivity type, the sixth semiconductor region being provided between the collector electrode and the first semiconductor region; and

an insulating member including a first insulating region, the first insulating region being provided between the semiconductor member and each of the gate electrodes,

wherein the gate electrodes are aligned in the second direction,

wherein the second semiconductor region, the fourth semiconductor region, and the fifth partial region are located between the gate electrodes in the second direction, and

wherein the fifth partial region has a peak of impurity concentration of the second conductivity type in the first direction, the peak being located between the gate electrodes in the second direction.

5 . The semiconductor device according to claim 3 , wherein

the fourth partial region includes a first position and a third position,

the fifth partial region includes a second position,

the first position is between the first partial region and one of the gate electrodes in the first direction,

the third position is between the first position and the one gate electrode in the first direction,

a direction from the third position to the second position is along the second direction,

a first position impurity concentration of the second conductivity type at the first position is higher than a second position impurity concentration of the second conductivity type at the second position, and

a third position impurity concentration of the second conductivity type at the third position is lower than the first position impurity concentration.

6 . The semiconductor device according to claim 5 , wherein the first position impurity concentration is not less than 1.5 times and not more than 100 times the second position impurity concentration.

7 . The semiconductor device according to claim 5 , wherein the third position impurity concentration is lower than the second position impurity concentration.

8 . The semiconductor device according to claim 6 , wherein an impurity concentration of the second conductivity type in the fourth partial region is highest at the first position in the first direction.

9 . The semiconductor device according to claim 8 , wherein

the fifth partial region includes a fourth position,

a direction from the fourth position to the second position is along the first direction,

a direction from the first position to the fourth position is along the second direction, and

the second position impurity concentration is higher than a fourth position impurity concentration of the second conductivity type at the fourth position.

10 . The semiconductor device according to claim 9 , wherein the first position impurity concentration is not less than 2 times and not more than 1000 times the fourth position impurity concentration.

11 . The semiconductor device according to claim 1 , wherein

the first insulating region further includes a second insulating portion, and

the second insulating portion is provided between the gate electrodes and the third semiconductor region, between the gate electrodes and the second semiconductor region, between the gate electrodes and the fourth semiconductor region, and between the gate electrodes and the fifth partial region in the second direction.

12 . The semiconductor device according to claim 1 , wherein a third impurity concentration of the first conductivity type in the third semiconductor region is higher than a first impurity concentration of the first conductivity type in the first semiconductor region.

13 . The semiconductor device according to claim 1 , wherein a fourth impurity concentration of the first conductivity type in the fourth semiconductor region is higher than a first impurity concentration of the first conductivity type in the first semiconductor region.

14 . The semiconductor device according to claim 1 , wherein

the second semiconductor region further includes a second semiconductor portion,

the third semiconductor region is located between the gate electrodes and the second semiconductor portion in the second direction, and

the second semiconductor portion is electrically connected to the emitter electrode.

15 . The semiconductor device according to claim 14 , wherein a second semiconductor portion impurity concentration of the second conductivity type in the second semiconductor portion is higher than a first semiconductor portion impurity concentration of the second conductivity type in the first semiconductor portion.

16 . The semiconductor device according to claim 1 , wherein a sixth impurity concentration of the second conductivity type in the sixth semiconductor region is higher than a fifth impurity concentration of the second conductivity type in the fifth semiconductor region.

17 . The semiconductor device according to claim 1 , wherein

the insulating member further includes a second insulating region, and

the second insulating region is located between the gate electrodes and the emitter electrode in the first direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2023
From: IWAKAJI, YOKO; MATSUDAI, TOMOKO; ITOKAZU, HIROKO
To: KABUSHIKI KAISHA TOSHIBA; TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 062485/0418 →
Priority Claims (1)
JP 2022-131922 · Aug 22, 2022 · national
Continuity (1)
Related Publication 20240063264A1 · Feb 22, 2024
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