IP Library › Granted Patent US 12,575,403
Granted Patent B2
US 12,575,403 · App. 17/943,224 · Granted Mar 10, 2026

Interconnect structure

Inventors: Shou-Zen Chang (Hsinchu, TW); Mei Ling Ho (Hsinchu County, TW); Tien-Lu Lin (Hsinchu, TW); Ming-Han Liao (Hsinchu, TW); Chia-Ming Wu (Hsinchu, TW); Jui-Neng Tu (Hsinchu County, TW)
Assignee: Powerchip Semiconductor Manufacturing Corporation
H01L23/5283H01L23/5226H01L23/53209H01L23/53214H01L23/53223H01L23/53238H01L23/53242H01L23/53252H01L23/53257H01L23/53266
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Quick Facts
Patent No.
US 12,575,403
App. No.
17/943,224
Granted
Mar 10, 2026
Kind
B2
Abstract

An interconnect structure including a dielectric structure, plugs, and conductive lines is provided. The dielectric structure is disposed on a substrate. The plugs are disposed in the dielectric structure. The conductive lines are disposed in the dielectric structure and are electrically connected to the plugs. The sidewall of at least one of the conductive lines is in direct contact with the dielectric structure.

Claims (27)

1 . An interconnect structure, comprising:

a dielectric structure disposed on a substrate;

plugs disposed in the dielectric structure; and

conductive lines disposed in the dielectric structure and electrically connected to the plugs, wherein a sidewall of at least one of the conductive lines is in direct contact with the dielectric structure,

a minimum pitch of the interconnect structure is less than 54 nm,

a line width of the at least one of the conductive lines is less than 22 nm, and

a material of the at least one of the conductive lines is molybdenum or cobalt.

2 . The interconnect structure according to claim 1 , wherein the plugs and the conductive lines are alternately stacked on the substrate.

3 . The interconnect structure according to claim 1 , wherein the dielectric structure comprises a multilayer structure.

4 . The interconnect structure according to claim 1 , wherein a sidewall of at least one of the plugs is in direct contact with the dielectric structure.

5 . The interconnect structure according to claim 1 , wherein sidewalls of all the plugs are in direct contact with the dielectric structure.

6 . The interconnect structure according to claim 1 , wherein a sidewall of at least one of the plugs is in direct contact with the dielectric structure, and a material of the at least one of the plugs comprises ruthenium, tungsten, or palladium.

7 . The interconnect structure according to claim 1 , wherein a sidewall of at least one of the plugs is not in direct contact with the dielectric structure, and a material of the at least one of the plugs comprises copper, cobalt, ruthenium, tungsten, or palladium.

8 . The interconnect structure according to claim 1 , further comprising:

a barrier layer disposed between at least one of the plugs and the dielectric structure.

9 . The interconnect structure according to claim 8 , wherein the barrier layer is further disposed directly below the at least one of the plugs, and a cross-sectional shape of the barrier layer comprises a U-shape.

10 . The interconnect structure according to claim 8 , wherein a material of the barrier layer comprises tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or a combination thereof.

11 . The interconnect structure according to claim 1 , further comprising:

a barrier layer disposed between the at least one of the conductive lines and at least one of the plugs.

12 . The interconnect structure according to claim 11 , wherein a cross-sectional shape of the barrier layer comprises a linear shape.

13 . The interconnect structure according to claim 11 , wherein a material of the barrier layer comprises tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, titanium tungsten, tungsten nitride, or a combination thereof.

14 . The interconnect structure according to claim 1 , wherein the sidewalls of all the conductive lines are in direct contact with the dielectric structure.

15 . The interconnect structure according to claim 1 , wherein the conductive lines comprise a conductive line whose sidewall is not in direct contact with the dielectric structure.

16 . The interconnect structure according to claim 15 , further comprising:

a barrier layer disposed between the conductive line whose sidewall is not in direct contact with the dielectric structure and the dielectric structure.

17 . The interconnect structure according to claim 16 , wherein the barrier layer is further disposed directly below the conductive line whose sidewall is not in direct contact with the dielectric structure, and a cross-sectional shape of the barrier layer comprises a U-shape.

18 . The interconnect structure according to claim 16 , wherein a material of the barrier layer comprises tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, titanium tungsten, tungsten nitride, or a combination thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2022
From: CHANG, SHOU-ZEN; HO, MEI LING; LIN, TIEN-LU; LIAO, MING-HAN; WU, CHIA-MING; TU, JUI-NENG
To: POWERCHIP SEMICONDUCTOR MANUFACTURING CORPORATION
Reel/Frame 061128/0923 →
Priority Claims (1)
TW 111130161 · Aug 11, 2022 · national
Continuity (1)
Related Publication 20240055351A1 · Feb 15, 2024
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