IP Library › Granted Patent US 12,581,591
Granted Patent B2
US 12,581,591 · App. 17/737,333 · Granted Mar 17, 2026

Circuit system and method of manufacturing a printed circuit board

Inventors: MingYi Yu (Saratoga, CA); Greg Bodi (Santa Cruz, CA); Ananta Attaluri (San Jose, CA)
Assignee: NVIDIA Corp.
H05K1/0262H01L23/36H01L23/49816H01L23/50H05K1/181H05K3/3436H05K2201/10704H05K2201/10734
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Quick Facts
Patent No.
US 12,581,591
App. No.
17/737,333
Granted
Mar 17, 2026
Kind
B2
Abstract

A circuit system includes an integrated circuit package mounted on a first side of a printed circuit board and a power regulator connected to power terminals of the integrated circuit package through a cutout in the printed circuit board. The power regulator draws power from the printed circuit board by way of connections on a shelf region extending beyond an area of the cutout. A method of manufacturing a printed circuit board includes forming a cutout in the printed circuit board, the cutout having an area less than a footprint of an integrated circuit package, mounting the integrated circuit package over the cutout on a first side of the printed circuit board, coupling a power regulator to power terminals of the integrated circuit package through the cutout, and interfacing the power regulator to a power plane of the printed circuit board by way of a shelf region extending beyond the area of the cutout on a second side of the printed circuit board.

Claims (30)

1 . A circuit system comprising:

an integrated circuit package mounted on a first side of a printed circuit board;

a power regulator connected to power terminals of the integrated circuit package through a cutout in the printed circuit board; and

wherein the power regulator draws power from the printed circuit board by way of connections on a shelf region extending beyond an area within the cutout occupied by the power regulator.

2 . The circuit system of claim 1 , wherein the integrated circuit package is mounted on top of the printed circuit board and the power regulator is mounted under the integrated circuit package.

3 . The circuit system of claim 2 , further comprising a heat sink shared by the integrated circuit package and the power regulator.

4 . The circuit system of claim 1 , wherein the connections on the shelf region comprise a ball grid array.

5 . The circuit system of claim 1 , wherein the cutout is smaller than a footprint of the integrated circuit package and the power terminals are located in a central region of the integrated circuit package.

6 . The circuit system of claim 5 , wherein the power regulator is connected to the power terminals of the central region via a ball grid array.

7 . The circuit system of claim 5 , wherein the power regulator is connected to the power terminals of the central region via spring pins.

8 . A circuit system comprising:

a graphics processing unit mounted on a first side of a printed circuit board;

a power regulator connected to power terminals of the graphics processing unit through a cutout in the printed circuit board; and

the power regulator coupled to a power plane of the printed circuit board via a shelf region of the power regulator on an underside of the printed circuit board.

9 . The circuit system of claim 8 , wherein the integrated circuit package is mounted on top of the printed circuit board and the power regulator is mounted under the integrated circuit package.

10 . The circuit system of claim 9 , further comprising a heat sink shared by the integrated circuit package and the power regulator.

11 . The circuit system of claim 8 , wherein connections on the shelf region comprise a ball grid array.

12 . The circuit system of claim 8 , wherein the cutout is smaller than a footprint of the integrated circuit package and the power regulator is interfaced to a central region of the integrated circuit package comprising the power terminals.

13 . The circuit system of claim 12 , wherein the power regulator is coupled to the power terminals of the central region via a ball grid array.

14 . The circuit system of claim 12 , wherein the power regulator is coupled to power terminals of the central region via spring pins.

15 . The circuit system of claim 14 , wherein the spring pins are part of the power regulator.

16 . The circuit system of claim 14 , wherein the spring pins are part of the integrated circuit package.

17 . A method of manufacturing a printed circuit board, the method comprising:

forming a cutout in the printed circuit board, the cutout having an area less than a footprint of an integrated circuit package;

mounting the integrated circuit package over the cutout on a first side of the printed circuit board;

coupling a power regulator to power terminals of the integrated circuit package through the cutout; and

interfacing the power regulator to a power plane of the printed circuit board by way of a shelf region extending beyond the area of the cutout on a second side of the printed circuit board.

18 . The method of claim 17 , wherein terminals on the shelf region comprise a ball grid array.

19 . The method of claim 17 , wherein the integrated circuit package and the power regulator are centered on the cutout.

20 . The method of claim 19 , wherein the power terminals of the integrated circuit package are located in the area of the cutout.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2022
From: YU, MINGYI; BODI, GREG; ATTALURI, ANANTA
To: NVIDIA CORP.
Reel/Frame 060045/0947 →
Continuity (1)
Related Publication 20230363085A1 · Nov 9, 2023
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