IP Library › Granted Patent US 12,581,747
Granted Patent B2
US 12,581,747 · App. 18/207,821 · Granted Mar 17, 2026

Manufacturing method of semiconductor device

Inventors: Shunpei Yamazaki (Setagaya, JP); Toshiya Endo (Atsugi, JP); Ryota Hodo (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H10D99/00
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Quick Facts
Patent No.
US 12,581,747
App. No.
18/207,821
Granted
Mar 17, 2026
Kind
B2
Abstract

To manufacture a semiconductor device by a method including the steps of: forming an oxide over a substrate, a first conductor over the oxide, and a second conductor over the first conductor; forming a first insulator to cover the oxide, the first conductor, and the second conductor; forming an opening in the first insulator to divide the second conductor into a third conductor and a fourth conductor; forming a second insulator and a third insulator to cover the oxide and the first insulator; processing the second insulator and the third insulator into a fourth insulator and a fifth insulator; processing the first conductor using the fourth insulator and the fifth insulator as a mask to divide the first conductor into a fifth conductor and a sixth conductor; and removing the fifth insulator.

Claims (45)

1 . A method of manufacturing a semiconductor device, comprising the steps of:

forming an oxide over a substrate, a first conductor over the oxide, and a second conductor over the first conductor;

forming a first insulator to cover the oxide, the first conductor, and the second conductor;

forming an opening in the first insulator and the second conductor to divide the second conductor into a third conductor and a fourth conductor;

forming a second insulator to cover the opening and the first insulator;

forming a third insulator over the second insulator;

processing the second insulator and the third insulator by a dry etching method into a fourth insulator in contact with a side surface of the first insulator, a side surface of the third conductor, and a side surface of the fourth conductor and a fifth insulator in contact with a side surface and a top surface of the fourth insulator;

processing the first conductor by the dry etching method using the fourth insulator and the fifth insulator as a mask to divide the first conductor into a fifth conductor and a sixth conductor;

removing the fifth insulator by isotropic etching;

performing heat treatment on the oxide in an atmosphere containing oxygen;

forming a sixth insulator to cover the oxide, the first insulator, and the fourth insulator;

forming a seventh conductor over the sixth insulator; and

processing the sixth insulator and the seventh conductor by CMP treatment to form a seventh insulator and an eighth conductor in the opening,

wherein a nitride insulator is formed as the second insulator, and

wherein an oxide insulator is formed as the third insulator.

2 . The method of manufacturing a semiconductor device, according to claim 1 ,

wherein silicon nitride is formed by a PEALD method as the second insulator.

3 . The method of manufacturing a semiconductor device, according to claim 1 ,

wherein silicon oxide is formed by a PEALD method as the third insulator.

4 . The method of manufacturing a semiconductor device, according to claim 1 ,

wherein a tantalum nitride is formed by a sputtering method as the first conductor.

5 . The method of manufacturing a semiconductor device, according to claim 1 ,

wherein tungsten is formed by a sputtering method as the second conductor.

6 . The method of manufacturing a semiconductor device, according to claim 1 ,

wherein an oxide containing indium, gallium, and zinc is formed by a sputtering method as the oxide.

7 . A method of manufacturing a semiconductor device, comprising the steps of:

forming an oxide over a substrate, a first conductor over the oxide, and a second conductor over the first conductor;

forming a first insulator to cover the oxide, the first conductor, and the second conductor;

forming an opening in the first insulator and the second conductor to expose the first conductor and divide the second conductor into a third conductor and a fourth conductor;

forming a second insulator to cover the opening and the first insulator;

forming a third insulator over the second insulator;

removing part of the second insulator and part of the third insulator to form a fourth insulator in contact with a sidewall of the opening and a fifth insulator in contact with a side surface and a top surface of the fourth insulator;

removing part of the first conductor overlapped with the opening to divide the first conductor into a fifth conductor and a sixth conductor;

removing the fifth insulator; and

forming a sixth insulator and a seventh conductor in the opening.

8 . The method of manufacturing a semiconductor device, according to claim 7 ,

wherein silicon nitride is formed by a PEALD method as the second insulator.

9 . The method of manufacturing a semiconductor device, according to claim 7 ,

wherein silicon oxide is formed by a PEALD method as the third insulator.

10 . The method of manufacturing a semiconductor device, according to claim 7 ,

wherein a tantalum nitride is formed by a sputtering method as the first conductor.

11 . The method of manufacturing a semiconductor device, according to claim 7 ,

wherein tungsten is formed by a sputtering method as the second conductor.

12 . The method of manufacturing a semiconductor device, according to claim 7 ,

wherein an oxide containing indium, gallium, and zinc is formed by a sputtering method as the oxide.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2023
From: YAMAZAKI, SHUNPEI; ENDO, TOSHIYA; HODO, RYOTA
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 063907/0745 →
Priority Claims (1)
JP 2022-098829 · Jun 20, 2022 · national
Continuity (1)
Related Publication 20230411500A1 · Dec 21, 2023
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