IP Library › Granted Patent US 12,597,898
Granted Patent B2
US 12,597,898 · App. 18/162,875 · Granted Apr 7, 2026

High-frequency circuit and communication device

Inventors: Takahiro Yamashita (Kyoto, JP); Masakazu Hirobe (Kyoto, JP)
Assignee: Murata Manufacturing Co., Ltd.
H03F3/60H03F3/24H03F3/45
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Quick Facts
Patent No.
US 12,597,898
App. No.
18/162,875
Granted
Apr 7, 2026
Kind
B2
Abstract

To provide a high-frequency circuit and a communication device by which a harmonic component in differential amplification can be attenuated. The high-frequency circuit includes a differential amplifier circuit. The differential amplifier circuit includes a first amplifying element, a second amplifying element, first wiring, second wiring, and a series circuit. The first amplifying element includes a first input terminal and a first output terminal. The second amplifying element includes a second input terminal and a second output terminal. The first wiring is connected to the first output terminal. The second wiring is connected to the second output terminal. The series circuit is connected between the first wiring and the second wiring. The series circuit includes a first inductor, a second inductor, and a capacitor.

Claims (63)

1 . A high-frequency circuit comprising:

a differential amplifier circuit; and

a mount substrate, wherein:

the differential amplifier circuit comprises:

a first amplifying circuit element comprising a first input terminal and a first output terminal,

a second amplifying circuit element comprising a second input terminal and a second output terminal,

first wiring connected to the first output terminal,

second wiring connected to the second output terminal,

a series circuit connected between the first wiring and the second wiring, the series circuit comprising a first inductor, a second inductor, and a capacitor

a differential amplifier comprising the first amplifying circuit element and the second amplifying circuit element, and

an output matching circuit connected to the first output terminal and the second output terminal,

the differential amplifier, the output matching circuit, and the capacitor included in the series circuit are placed on the mount substrate, and

in a view from an arrangement direction of the output matching circuit and the differential amplifier, a first portion that is at least a portion of the capacitor included in the series circuit overlaps with the output matching circuit, and a second portion that is at least a portion of the capacitor included in the series circuit overlaps with the differential amplifier.

2 . The high-frequency circuit according to claim 1 , wherein

the differential amplifier circuit further comprises:

a third inductor connected between the first output terminal and the first wiring, and

a fourth inductor connected between the second output terminal and the second wiring.

3 . The high-frequency circuit according to claim 2 , wherein

an inductance value of the third inductor and an inductance value of the fourth inductor are identical.

4 . The high-frequency circuit according to claim 1 , wherein

an inductance values of the first inductor and an inductance value of the second inductor are identical.

5 . The high-frequency circuit according to claim 1 , wherein

the capacitor comprises a chip capacitor.

6 . The high-frequency circuit according to claim 1 , wherein

the differential amplifier circuit further comprises a balun circuit that includes a pair of balanced terminals that are each connected to the first wiring and the second wiring and an unbalanced terminal.

7 . The high-frequency circuit according to claim 6 , wherein

the differential amplifier circuit further comprises a serial resonance circuit comprising a first end connected to the unbalanced terminal, and

the serial resonance circuit comprises a second capacitor, the second capacitor being different from a first capacitor that is made of the capacitor of the series circuit, and an inductor.

8 . A high-frequency circuit comprising:

a differential amplifier circuit; and

a mount substrate, wherein:

the differential amplifier circuit comprises:

a first amplifying circuit element comprising a first input terminal and a first output terminal,

a second amplifying circuit element comprising a second input terminal and a second output terminal,

first wiring connected to the first output terminal,

second wiring connected to the second output terminal,

a series circuit connected between the first wiring and the second wiring, the series circuit comprising a first inductor, a second inductor, and a capacitor

a differential amplifier comprising the first amplifying circuit element and the second amplifying circuit element, and

an output matching circuit connected to the first output terminal and the second output terminal,

the differential amplifier, the output matching circuit, and the capacitor included in the series circuit are placed on the mount substrate, and

in a view from a second direction orthogonal to both of a thickness direction of the mount substrate and a first direction that is an arrangement direction of the output matching circuit and the differential amplifier, the capacitor included in the series circuit is placed on the mount substrate and between a first outer edge, farther from the differential amplifier, of two outer edges of the output matching circuit along the second direction and second outer edge, farther from the output matching circuit, of two outer edges of the differential amplifier along the second direction.

9 . The high-frequency circuit according to claim 8 , wherein

the capacitor included in the series circuit is placed between the output matching circuit and the differential amplifier in a plan view from the thickness direction of the mount substrate.

10 . A communication device comprising:

the high-frequency circuit according to claim 1 ; and

a signal processing circuit that is connected to the high-frequency circuit.

11 . The high-frequency circuit according to claim 2 , wherein an inductance values of the first inductor and an inductance value of the second inductor are identical.

12 . The high-frequency circuit according to claim 3 , wherein

an inductance values of the first inductor and an inductance value of the second inductor are identical.

13 . The high-frequency circuit according to claim 2 , wherein

the capacitor comprises a chip capacitor.

14 . The high-frequency circuit according to claim 3 , wherein

the capacitor comprises a chip capacitor.

15 . The high-frequency circuit according to claim 4 , wherein

the capacitor comprises a chip capacitor.

16 . The high-frequency circuit according to claim 2 , wherein

the differential amplifier circuit further comprises a balun circuit that includes a pair of balanced terminals that are each connected to the first wiring and the second wiring and an unbalanced terminal.

17 . The high-frequency circuit according to claim 3 , wherein

the differential amplifier circuit further comprises a balun circuit that includes a pair of balanced terminals that are each connected to the first wiring and the second wiring and an unbalanced terminal.

18 . The high-frequency circuit according to claim 1 , wherein

the capacitor included in the series circuit overlaps with at least one of the output matching circuit and the differential amplifier in the view from the arrangement direction.

19 . The high-frequency circuit according to claim 1 , wherein

a center of the capacitor included in the series circuit is aligned with a center of at least one of the output matching circuit and the differential amplifier along the arrangement direction in a plan view from a thickness direction of the mount substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2023
From: YAMASHITA, TAKAHIRO; HIROBE, MASAKAZU
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 062561/0698 →
Priority Claims (2)
JP 2020-136491 · Aug 12, 2020 · national
JP 2021-024664 · Feb 18, 2021 · national
Continuity (2)
Continuation PCTJP2021028579 · Aug 2, 2021
Related Publication 20230179157A1 · Jun 8, 2023
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