IP Library › Granted Patent US 12,604,581
Granted Patent B2
US 12,604,581 · App. 17/864,369 · Granted Apr 14, 2026

Method for manufacturing electronic device

Inventors: Yuan-Lin Wu (Miao-Li County, TW); Tsung-Han Tsai (Miao-Li County, TW); Jia-Yuan Chen (Miao-Li County, TW); Kuan-Feng Lee (Miao-Li County, TW)
Assignee: InnoLux Corporation
H10H20/857H10H20/852H10H20/0362H10H20/0364
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,604,581
App. No.
17/864,369
Granted
Apr 14, 2026
Kind
B2
Abstract

A method for manufacturing an electronic device includes: providing a base layer; forming a patterned circuit layer on the base layer, the patterned circuit layer having a first opening; placing an electronic element on the patterned circuit layer; and patterning the base layer to form a second opening which is at least partially overlapped with the first opening. The step of placing the electronic element is performed after the step of forming the patterned circuit layer.

Claims (29)

1 . A method for manufacturing an electronic device, comprising:

providing a base layer;

forming a patterned circuit layer on the base layer, the patterned circuit layer having a first opening;

placing an electronic element on the patterned circuit layer; forming a first encapsulation portion on the electronic element after the step of placing the electronic element;

forming a second encapsulation portion on the first encapsulation portion and a sidewall of the first opening; and

patterning the base layer to form a second opening which is at least partially overlapped with the first opening after the step of forming the second encapsulation portion;

wherein the step of placing the electronic element is performed after the step of forming the patterned circuit layer.

2 . The method according to claim 1 , wherein the step of forming the patterned circuit layer comprises:

forming an insulation layer on the base layer;

forming a patterned conductive layer on the insulation layer; and

patterning the insulation layer to form at least a part of the first opening after the step of forming the patterned conductive layer.

3 . The method according to claim 2 , wherein the insulation layer and the base layer are patterned by different processes.

4 . The method according to claim 3 , wherein the insulation layer is patterned by an etching process, and the base layer is patterned by a laser drilling process.

5 . The method according to claim 1 , wherein the step of forming the patterned circuit layer comprises:

forming an insulation layer on the base layer;

patterning the insulation layer to form at least a part of the first opening; and

forming a patterned conductive layer after the step of patterning the insulation layer.

6 . The method according to claim 5 , wherein the insulation layer and the base layer are patterned by different processes.

7 . The method according to claim 6 , wherein the insulation layer is patterned by an etching process, and the base layer is patterned by a laser drilling process.

8 . The method according to claim 1 , further comprising filling an elastic material in the first opening.

9 . The method according to claim 8 , wherein the step of patterning the base layer is performed after the step of filling the elastic material in the first opening.

10 . The method according to claim 1 , further comprising filling an elastic material in the first opening and the second opening after the step of patterning the base layer.

11 . The method according to claim 1 , further comprising:

providing a carrier;

attaching the base layer on the carrier;

flipping the carrier and the base layer as a whole;

removing the carrier; and

attaching an elastic substrate under the base layer.

12 . The method according to claim 1 , wherein the first opening is communicated with the second opening.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2022
From: WU, YUAN-LIN; TSAI, TSUNG-HAN; CHEN, JIA-YUAN; LEE, KUAN-FENG
To: INNOLUX CORPORATION
Reel/Frame 060500/0968 →
Priority Claims (1)
CN 202110919883.6 · Aug 11, 2021 · national
Continuity (1)
Related Publication 20230048771A1 · Feb 16, 2023
References Cited (14)
US 9076736B2 · Huang · 2015 [cited by examiner]
US 10541380B1 · Sung · 2020 [cited by examiner]
US 20180260053A1 · Hong · 2018 [cited by examiner]
US 20190035719A1 · Daitoku · 2019 [cited by examiner]
US 20190074345A1 · Lee · 2019 [cited by examiner]
US 20200127217A1 · Bae · 2020 [cited by examiner]
US 20200413544A1 · Gao · 2020 [cited by applicant]
US 20220416127A1 · Choi · 2022 [cited by examiner]
CN 112153811A · 2020 [cited by applicant]
CN 112186023A · 2021 [cited by applicant]
CN 112530864A · 2021 [cited by applicant]
TW 201006334 · 2010 [cited by applicant]
TW 201006335 · 2010 [cited by applicant]
TW 202127607A · 2021 [cited by applicant]