Method of forming mask with reduced feature sizes
A method of manufacturing a semiconductor device is provided. The method includes: providing a substrate; forming a plurality of first mask layers over the substrate, wherein each of the first mask layers extends along a first direction; forming a plurality of second mask layers over the substrate, wherein each of the second mask layers extends along a second direction different from the first direction; patterning the plurality of second mask layers to form a cut pattern; forming a first aperture modification layer on the cut pattern to define a plurality of first openings overlapping the plurality of first mask layers along a third direction substantially orthogonal to the first direction and the second direction; patterning the plurality of first mask layers to form an active region definition pattern; and patterning the substrate to define an active region by the active region definition pattern.
1 . A method of manufacturing a semiconductor device, comprising:
providing a substrate;
forming a plurality of first mask layers over the substrate, wherein each of the first mask layers extends along a first direction;
forming a plurality of second mask layers over the substrate, wherein each of the second mask layers extends along a second direction different from the first direction;
patterning the plurality of second mask layers to form a cut pattern;
forming a first aperture modification layer on the cut pattern to define a plurality of first openings overlapping the plurality of first mask layers along a third direction substantially orthogonal to the first direction and the second direction;
patterning the plurality of first mask layers to form an active region definition pattern; and
patterning the substrate to define an active region by the active region definition pattern;
wherein forming the cut pattern comprises:
forming a plurality of islands over the plurality of second mask layers; and
forming an opening pattern definition layer on the plurality of islands to define a plurality of second openings;
removing the plurality of islands to form a plurality of third openings; and
forming the cut pattern by removing the plurality of second mask layers overlapping the plurality of second openings and the plurality of third openings along the third direction;
wherein the plurality of second openings and the plurality of third openings are alternatively arranged;
wherein forming the plurality of second mask layers comprises:
forming a dielectric layer over the plurality of first mask layers;
forming a photoresist pattern over the dielectric layer;
forming a pitch definition layer on the photoresist pattern; and
patterning the dielectric layer by removing the dielectric layer not overlapping the pitch definition layer along the third direction.
2 . The method of claim 1 , wherein an angle defined by the first direction and the second direction ranges from about 20° to about 35°.
3 . The method of claim 1 , wherein the first aperture modification layer is formed by an atomic deposition layer process.
4 . The method of claim 1 , wherein the first aperture modification layer comprises oxide, nitride, oxynitride, or a combination thereof.
5 . The method of claim 1 , wherein the opening pattern definition layer is formed by an atomic deposition layer process.
6 . The method of claim 1 , further comprising:
forming a second aperture modification layer on the opening pattern definition layer to modify dimensions of the plurality of second openings and the plurality of third openings.
7 . The method of claim 1 , wherein each of the plurality of first openings is smaller than each of the plurality of second openings.
8 . The method of claim 1 , wherein a pitch of the plurality of second openings is substantially equal to a pitch of the plurality of third openings.
9 . The method of claim 1 , wherein a pitch of the plurality of second mask layers is defined by the pitch definition layer.