Interlevel dielectric structure in semiconductor device
A semiconductor device including a substrate, a low-k dielectric layer, a cap layer, and a conductive layer is provided. The low-k dielectric layer is disposed over the substrate. The cap layer is disposed on the low-k dielectric layer, wherein a carbon atom content of the cap layer is greater than a carbon atom content of the low-k dielectric layer. The conductive layer is disposed in the cap layer and the low-k dielectric layer.
1 . A semiconductor device, comprising:
an etch stop layer disposed over a substrate, wherein the etch stop layer is a four-layer structure comprising, from bottom to top, AlO x N y , SiCO, AlO x and SiCO;
a low-k dielectric layer disposed over the etch stop layer;
a cap layer disposed on the low-k dielectric layer, wherein a carbon atom content of the cap layer is greater than a carbon atom content of the low-k dielectric layer; and
a conductive feature penetrating through the cap layer, the low-k dielectric layer and the etch stop layer,
wherein the carbon atom content of the cap layer is decreased in a direction away from the substrate.
2 . The semiconductor device according to claim 1 , wherein the carbon atom content of the low-k dielectric layer ranges from 10 at % to 25 at %.
3 . The semiconductor device according to claim 1 , wherein the carbon atom content of the cap layer ranges from 20 at % to 35 at %.
4 . The semiconductor device according to claim 1 , wherein a dielectric constant of the cap layer is greater than a dielectric constant of the low-k dielectric layer.
5 . The semiconductor device according to claim 1 , wherein a dielectric constant of the low-k dielectric layer is less than 3.5.
6 . The semiconductor device according to claim 1 , wherein a dielectric constant of the low-k dielectric layer ranges from 2.6 to 3.3.
7 . The semiconductor device according to claim 1 , wherein a dielectric constant of the cap layer ranges from 3.0 to 4.2.
8 . The semiconductor device according to claim 1 , wherein a Mohs hardness of the cap layer is higher than a Mohs hardness of the low-k dielectric layer.
9 . The semiconductor device according to claim 1 , wherein a Mohs hardness of the low-k dielectric layer ranges from 2 GPa to 8 GPa.
10 . The semiconductor device according to claim 1 , wherein a Mohs hardness of the cap layer ranges from 5 GPa to 20 GPa.
11 . The semiconductor device according to claim 1 , wherein a thickness of the cap layer is less than 20% of a total thickness of the etch stop layer, the low-k dielectric layer, and the cap layer.
12 . The semiconductor device according to claim 1 , wherein a top surface the cap layer is flush with a top surface of the conductive feature.
13 . A semiconductor device, comprising:
a four-layer etch stop structure disposed over a substrate;
a low-k dielectric layer disposed over the four-layer etch stop structure;
a cap layer disposed on the low-k dielectric layer, wherein a carbon atom content of the cap layer ranges from 20 at % to 35 at %; and
a conductive feature penetrating through the cap layer, the low-k dielectric layer and the four-layer etch stop structure, wherein the four-layer etch stop structure is located around a lower sidewall of the conductive feature,
wherein the carbon atom content of the cap layer is decreased in a direction away from the substrate, and the carbon atom content of the cap layer is greater than a carbon atom content of the low-k dielectric layer.
14 . The semiconductor device according to claim 13 , wherein the four-layer etch stop structure comprises, from bottom to top, AlO x N y , SiCO, AlO x and SiCO.
15 . The semiconductor device according to claim 13 , wherein the carbon atom content of the low-k dielectric layer ranges from 10 at % to 25 at %.
16 . The semiconductor device according to claim 13 , wherein a dielectric constant of the cap layer is greater than a dielectric constant of the low-k dielectric layer.
17 . A semiconductor device, comprising:
a four-layer etch stop structure disposed over a substrate;
a dielectric layer disposed over the four-layer etch stop structure;
a conductive feature penetrating through the dielectric layer and the four-layer etch stop structure, wherein the conductive feature has a lower portion and an upper portion wider than the lower portion, and the entire four-layer etch stop structure is located around a lower sidewall of the lower portion; and
a cap layer disposed on the dielectric layer, wherein a carbon atom content of the cap layer is decreased in a direction away from the substrate, and the carbon atom content of the cap layer is greater than a carbon atom content of the dielectric layer.
18 . The semiconductor device according to claim 17 , wherein the four-layer etch stop structure comprises, from bottom to top, AlO x N y , SiCO, AlO x and SiCO.
19 . The semiconductor device according to claim 17 , wherein the cap layer has a multi-layer structure.
20 . The semiconductor device according to claim 17 , wherein the carbon atom content of the cap layer ranges from 20 at % to 35 at %.