IP Library Granted Patent US 12,604,739
Granted Patent B2
US 12,604,739 · App. 18/188,844 · Granted Apr 14, 2026

Semiconductor device and method of forming a 3-D stacked semiconductor package structure

Inventors: SeungHyun Lee (Incheon, KR); YeJin Park (Incheon, KR); HeeSoo Lee (Incheon, KR)
Assignee: JCET STATS ChipPAC Korea Limited
H10W44/20H10W42/20H10W74/016H10W74/117H10W44/248H10W72/29H10W72/9413H10W72/952H10W90/724
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Quick Facts
Patent No.
US 12,604,739
App. No.
18/188,844
Granted
Apr 14, 2026
Kind
B2
Abstract

A semiconductor device has a substrate and a first electrical component disposed over the substrate. An encapsulant is deposited over the first electrical component. A shielding layer is formed over the encapsulant. The shielding layer is patterned to form a conductive trace and a contact pad. A board-to-board (B2B) connector is disposed over the encapsulant and electrically coupled to the substrate by the conductive trace.

Claims (58)

1 . A semiconductor device, comprising:

a substrate including a portion of a conductive layer exposed at a side surface of the substrate;

a first electrical component disposed over the substrate;

an encapsulant deposited over the first electrical component;

a shielding layer formed over a top surface of the encapsulant and a side surface of the encapsulant, wherein the shielding layer is patterned over the top surface of the encapsulant and the side surface of the encapsulant to form,

a conductive trace that extends from the top surface of the encapsulant to the side surface of the encapsulant,

a portion of the shielding layer at a first end of the conductive trace on the side surface of the encapsulant patterned to match a shape of the portion of the conductive layer of the substrate exposed at the side surface of the substrate, wherein the portion of the shielding layer is formed directly on the portion of the conductive layer over the substrate, and

a contact pad at a second end of the conductive trace on the top surface of the encapsulant; and

a B2B connector disposed over the encapsulant and electrically coupled to the substrate by the conductive trace.

2 . The semiconductor device of claim 1 , wherein the first electrical component is disposed under the B2B connector.

3 . The semiconductor device of claim 2 , further including a second electrical component disposed over the substrate, wherein the shielding layer remains unpatterned over the second electrical component.

4 . The semiconductor device of claim 1 , wherein the shielding layer is formed with a first number of layers in a first area over the top surface of the encapsulant and the side surface of the encapsulant and a second number of layers less than the first number of layers in a second area over the top surface of the encapsulant and the side surface of the encapsulant, and wherein the shielding layer is patterned to form the conductive trace and contact pad in the second area.

5 . The semiconductor device of claim 1 , wherein the encapsulant is molded to include a stepped top surface.

6 . A semiconductor device, comprising:

a substrate;

an encapsulant deposited over the substrate;

a shielding layer formed over the encapsulant, wherein the shielding layer is patterned on a top surface of the encapsulant and a side surface of the encapsulant to form a conductive trace extending from the top surface of the encapsulant to the side surface of the encapsulant; and

a first electrical component disposed over the encapsulant and electrically coupled to the substrate by the conductive trace.

7 . The semiconductor device of claim 6 , further including a second electrical component disposed in the encapsulant under the first electrical component.

8 . The semiconductor device of claim 6 , further including a second electrical component disposed in the encapsulant, wherein the shielding layer remains unpatterned over the second electrical component.

9 . The semiconductor device of claim 6 , wherein the shielding layer is formed with a first number of layers in a first area and a second number of layers less than the first number of layers in a second area, and wherein the shielding layer is patterned to form the conductive trace in the second area.

10 . The semiconductor device of claim 6 , wherein the conductive trace extends to a conductive layer of the substrate.

11 . The semiconductor device of claim 6 , wherein the encapsulant is molded to include a stepped top surface.

12 . The semiconductor device of claim 11 , wherein a top surface of the encapsulant in a first area is at a greater height above the substrate than a top surface of the first electrical component.

13 . A method of making a semiconductor device, comprising:

providing a substrate including a portion of a conductive layer exposed at a side surface of the substrate;

disposing a first electrical component over the substrate;

depositing an encapsulant over the first electrical component;

forming a shielding layer over a top surface of the encapsulant and a side surface of the encapsulant;

patterning the shielding layer over the top surface of the encapsulant and the side surface of the encapsulant to form,

a conductive trace that extends from the top surface of the encapsulant to the side surface of the encapsulant,

a portion of the shielding layer at a first end of the conductive trace on the side surface of the encapsulant patterned to match a shape of the portion of the conductive layer of the substrate exposed at the side surface of the substrate, wherein the portion of the shielding layer is formed directly on the portion of the conductive layer over the substrate, and

a contact pad at a second end of the conductive trace on the top surface of the encapsulant; and

disposing a B2B connector over the encapsulant and electrically coupled to the substrate by the conductive trace.

14 . The method of claim 13 , further including disposing the B2B connector over the first electrical component.

15 . The method of claim 14 , further including disposing a second electrical component over the substrate, wherein the shielding layer remains unpatterned over the second electrical component after patterning the shielding layer to form the conductive trace and contact pad.

16 . The method of claim 13 , further including:

forming the shielding layer as a plurality of conductive layers, wherein a mask is disposed over a first area of the encapsulant while forming one or more of the conductive layers; and

patterning the shielding layer to form the conductive trace and contact pad in the first area.

17 . The method of claim 13 , further including molding the encapsulant to include a stepped top surface.

18 . A method of making a semiconductor device, comprising:

providing a substrate;

depositing an encapsulant over the substrate;

forming a shielding layer over the encapsulant;

patterning the shielding layer on a top surface of the encapsulant and a side surface of the encapsulant to form a conductive trace extending from the top surface of the encapsulant to the side surface of the encapsulant; and

disposing a first electrical component over the encapsulant and electrically coupled to the substrate by the conductive trace.

19 . The method of claim 18 , further including:

disposing a second electrical component over the substrate;

depositing the encapsulant over the second electrical component; and

disposing the first electrical component over the second electrical component.

20 . The method of claim 18 , further including:

disposing a second electrical component over the substrate;

depositing the encapsulant over the second electrical component; and

forming the shielding layer over the second electrical component, wherein the shielding layer remains unpatterned over the second electrical component after patterning the shielding layer to form the conductive trace.

21 . The method of claim 18 , further including:

forming the shielding layer as a plurality of conductive layers, wherein a mask is disposed over a first area of the encapsulant while forming one or more of the conductive layers; and

patterning the shielding layer to form the conductive trace in the first area.

22 . The method of claim 18 , further including molding the encapsulant to include a stepped top surface.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2023
From: LEE, SEUNGHYUN; PARK, YEJIN; LEE, HEESOO
To: JCET STATS CHIPPAC KOREA LIMITED
Reel/Frame 063078/0806 →
Continuity (1)
Related Publication 20240321783A1 · Sep 26, 2024
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