IP Library › Granted Patent US 12,615,452
Granted Patent B2
US 12,615,452 · App. 18/638,064 · Granted Apr 28, 2026

Photoelectric conversion device, photoelectric conversion system, and moving body

Inventor: Tomoya Sasago (Kanagawa, JP)
Assignee: Canon Kabushiki Kaisha
H04N25/709H04N25/76H10F39/80373
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Quick Facts
Patent No.
US 12,615,452
App. No.
18/638,064
Granted
Apr 28, 2026
Kind
B2
Abstract

A photoelectric conversion device includes an avalanche photodiode including a first terminal and a second terminal, a first power supply connected to the first terminal, a second power supply connected to the second terminal, and a switch for switching a resistance value between the first power supply and the first terminal. The first terminal of the avalanche photodiode is connected to each of a gate of a first p-channel metal-oxide semiconductor (PMOS) transistor and a gate of a first n-channel MOS (NMOS) transistor, the first PMOS transistor and the first NMOS transistor being connected in series between a third and a fourth power supplies. The photoelectric conversion device further includes a first cut-off unit for cutting off an electrical path between the third power supply and the fourth power supply, and if the switch is controlled to a standby state, the first cut-off unit cuts off the electrical path.

Claims (53)

1 . A photoelectric conversion device comprising:

an avalanche photodiode including a first terminal and a second terminal;

a first power supply connected to the first terminal;

a second power supply connected to the second terminal; and

a switch configured to switch a resistance value between the first power supply and the first terminal,

wherein the first terminal of the avalanche photodiode is connected to each of a gate of a first p-channel metal-oxide semiconductor (PMOS) transistor and a gate of a first n-channel MOS (NMOS) transistor, the first PMOS transistor and the first NMOS transistor being connected in series between a third power supply and a fourth power supply, and

wherein the photoelectric conversion device further comprises a first cut-off unit configured to cut off an electrical path between the third power supply and the fourth power supply, and in a case where the switch is controlled to a standby state, the first cut-off unit cuts off the electrical path.

2 . The photoelectric conversion device according to claim 1 ,

wherein the switch is a metal-oxide semiconductor (MOS) transistor, and a gate of the switch is connected to a first control line, and

wherein the photoelectric conversion device controls a state where a voltage applied to the avalanche photodiode exceeds a breakdown voltage and a state where the voltage applied to the avalanche photodiode does not exceed the breakdown voltage.

3 . The photoelectric conversion device according to claim 1 ,

wherein the switch is a MOS transistor, and a gate of the switch is connected to a first control line, and

wherein the photoelectric conversion device controls a standby state where avalanche multiplication by the avalanche photodiode is possible and a recharging state for returning to a state where the avalanche multiplication by the avalanche photodiode is possible.

4 . The photoelectric conversion device according to claim 2 ,

wherein the first cut-off unit is a MOS transistor, and a gate of the first cut-off unit is connected to a second control line, and

wherein the electrical path is controlled between a conductive state and a non-conductive state by a second signal input from the second control line for the first cut-off unit.

5 . The photoelectric conversion device according to claim 4 ,

wherein the second signal is generated by a logical operation between a first signal input from the first control line and a third signal, and

wherein the second signal controls the first cut-off unit.

6 . The photoelectric conversion device according to claim 1 , wherein the first PMOS transistor and the first NMOS transistor include a waveform shaping function for generating a pulse based on an output signal from the avalanche photodiode.

7 . The photoelectric conversion device according to claim 1 , wherein an output terminal of a logic circuit including the first cut-off unit is connected to a counter circuit.

8 . The photoelectric conversion device according to claim 7 ,

wherein the logic circuit includes a second PMOS transistor and a second NMOS transistor,

wherein a source of the first PMOS transistor is connected to the third power supply,

wherein a source of the first NMOS transistor is connected to the fourth power supply,

wherein a drain of the first PMOS transistor and a source of the second PMOS transistor are connected,

wherein a drain of the second PMOS transistor, a drain of the first NMOS transistor, and a drain of the second NMOS transistor are connected, and

wherein the source of the first NMOS transistor and a source of the second NMOS transistor are connected.

9 . The photoelectric conversion device according to claim 7 ,

wherein the logic circuit includes a second PMOS transistor and a second NMOS transistor,

wherein a source of the first PMOS transistor is connected to the third power supply,

wherein a source of the first NMOS transistor is connected to the fourth power supply,

wherein a drain of the first PMOS transistor, a drain of the second PMOS transistor, and a drain of the second NMOS transistor are connected,

wherein the source of the first PMOS transistor and a source of the second PMOS transistor are connected, and

wherein a drain of the first NMOS transistor and a source of the second NMOS transistor are connected.

10 . The photoelectric conversion device according to claim 7 ,

wherein the logic circuit includes a second PMOS transistor and a second NMOS transistor,

wherein a source of the first PMOS transistor is connected to the third power supply,

wherein a source of the first NMOS transistor is connected to the fourth power supply,

wherein a source of the second PMOS transistor is connected to a drain of the first PMOS transistor,

wherein a source of the second NMOS transistor is connected to a drain of the first NMOS transistor, and

wherein a drain of the second PMOS transistor and a drain of the second NMOS transistor are connected.

11 . The photoelectric conversion device according to claim 7 , further comprising a second cut-off unit,

wherein a first terminal of the second cut-off unit is connected to a node between the output terminal of the logic circuit and an input terminal of the counter circuit, and a second terminal of the second cut-off unit is connected to one of a power supply or a ground potential.

12 . The photoelectric conversion device according to claim 1 , wherein the avalanche photodiode outputs a photon detection signal based on detection of a photon during an exposure period.

13 . The photoelectric conversion device according to claim 12 , wherein the first cut-off unit controls the electrical path to a cut-off state during a period other than the exposure period.

14 . The photoelectric conversion device according to claim 1 , wherein the first power supply and the third power supply are configured to supply a common voltage.

15 . A photoelectric conversion system comprising:

the photoelectric conversion device according to claim 1 ; and

a signal processing unit configured to generate an image using a signal output from the photoelectric conversion device.

16 . A moving body comprising:

the photoelectric conversion device according to claim 1 ; and

a control unit configured to control traveling of the moving body using a signal output from the photoelectric conversion device.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2024
From: SASAGO, TOMOYA
To: CANON KABUSHIKI KAISHA
Reel/Frame 067231/0543 →
Priority Claims (1)
JP 2021-171689 · Oct 20, 2021 · national
Continuity (2)
Continuation PCTJP2022037576 · Oct 7, 2022
Related Publication 20240267651A1 · Aug 8, 2024
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