IGBT device with electrode pads of varied shape to discriminate pads in chip operation and testing
View Patent ↗A semiconductor device includes first and second electrodes, first to fourth semiconductor regions, first and second control electrodes, and first and second electrode pads. The first semiconductor region is located on the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on the second semiconductor region. The fourth semiconductor region is located on a portion of the third semiconductor region. The first control electrode faces the second, third, and fourth semiconductor regions via a first insulating film. The second control electrode faces the second and third semiconductor regions via a second insulating film. The first electrode pad is electrically connected with the first control electrode. The second electrode pad is electrically connected with the second control electrode. The second electrode pad has a different planar shape from the first electrode pad.
1 . A semiconductor device, comprising:
a first electrode;
a first semiconductor region located on the first electrode, the first semiconductor region being of a first conductivity type;
a second semiconductor region located on the first semiconductor region, the second semiconductor region being of a second conductivity type;
a third semiconductor region located on the second semiconductor region, the third semiconductor region being of the first conductivity type;
a fourth semiconductor region located on a portion of the third semiconductor region, the fourth semiconductor region being of the second conductivity type;
a first control electrode facing the second, third, and fourth semiconductor regions via a first insulating film;
a second control electrode separated from the first control electrode in a second direction perpendicular to a first direction, the first direction being from the first electrode toward the first semiconductor region, the second control electrode being electrically isolated from the first control electrode, the second control electrode facing the second and third semiconductor regions via a second insulating film;
a second electrode positioned above the third and fourth semiconductor regions, the second electrode being electrically connected with the third and fourth semiconductor regions;
a first electrode pad electrically connected with the first control electrode; and
a second electrode pad electrically connected with the second control electrode, the second electrode pad having a different planar shape from the first electrode pad.
2 . The semiconductor device according to claim 1 , wherein
an area of the first electrode pad is different from an area of the second electrode pad.
3 . The semiconductor device according to claim 1 , wherein
a first electrical capacitance between the first electrode pad and the second electrode is greater than a second electrical capacitance between the second electrode pad and the second electrode, and a first electrical resistance of the semiconductor device when a current flows in the semiconductor device via the first electrode pad is less than a second electrical resistance of the semiconductor device when a current flows in the semiconductor device via the second electrode pad, or
the second electrical capacitance is greater than the first electrical capacitance, and the second electrical resistance is less than the first electrical resistance.
4 . The semiconductor device according to claim 1 , wherein
a first electrical capacitance between the first electrode pad and the second electrode is greater than a second electrical capacitance between the second electrode pad and the second electrode, and an area of the first electrode pad is greater than an area of the second electrode pad, or
the second electrical capacitance is greater than the first electrical capacitance, and the area of the second electrode pad is greater than the area of the first electrode pad.
5 . The semiconductor device according to claim 3 , wherein
the second electrical capacitance is greater than the first electrical capacitance.
6 . The semiconductor device according to claim 1 , wherein
a plurality of the first control electrodes is provided,
a plurality of the second control electrodes is provided, and
a number of the second control electrodes is greater than a number of the first control electrodes.
7 . The semiconductor device according to claim 1 , wherein
a potential of the second control electrode is switched from an on-state of being greater than a reference potential to an off-state of being less than the reference potential before a potential of the first control electrode is switched from an on-state of being greater than the reference potential to an off-state of being less than the reference potential.
8 . The semiconductor device according to claim 1 , wherein
a semiconductor region of the second conductivity type is not provided on the third semiconductor region in contact with the second insulating film.
9 . The semiconductor device according to claim 1 , wherein
the first electrode pad and the second electrode pad are positioned on a diagonal of the semiconductor device in a plane perpendicular to the first direction, and
a center of the semiconductor device is positioned between the first electrode pad and the second electrode pad in the plane.
10 . The semiconductor device according to claim 1 , wherein
the first electrode pad and the second electrode pad are located in a same plane.