Memory searching engine, reference array and reference calibrating method
A memory searching engine is provided in present disclosure. The memory searching engine stores at least one reference time and at least one reference voltage corresponding to multiple Hamming distances and comprises a data array and a reference array. The data array stores at least one first pattern data and is configured to perform a data searching according to the difference between at least one input data and the first pattern data. The reference array stores at least one second pattern data and receives the input data. Each of the first and second pattern data comprises m features, wherein m is an integer. The memory searching engine calculates multiple updated reference times and updated reference voltages corresponding to the Hamming distances based on the second pattern data, and update the reference time according to the updated reference times, or update the reference voltage according to the updated reference voltages.
1 . A memory searching engine, storing at least one reference time and at least one reference voltage corresponding to a plurality of Hamming distances, wherein the memory searching engine comprises:
a data array, storing at least one first pattern data and configured to perform a data searching according to the difference between at least one input data and the at least one first pattern data, so as to generate a searching result; and
a reference array, storing at least one second pattern data and configured to receive the at least one input data,
wherein the memory searching engine is further configured to calculate a plurality of updated reference times and a plurality of updated reference voltages corresponding to the plurality of Hamming distances based on the at least one second pattern data and perform a reference calibrating, so as to update the at least one reference time according to the plurality of updated reference times, or update the at least one reference voltage according to the plurality of updated reference voltages.
2 . The memory searching engine of claim 1 , wherein the reference array comprises a plurality of bit lines and a plurality of Not-AND (NAND) strings, the plurality of NAND strings are each coupled between one of the plurality of bit lines and a common source line, and
wherein the plurality of NAND strings are configured to store the at least one second pattern data, and ones of the plurality of NAND strings coupled to the same bit line respectively store a plurality of portions of the at least one second pattern data, and the plurality of portions are same to each other.
3 . The memory searching engine of claim 1 , wherein the at least one second pattern data comprises a plurality of second pattern data in different types, and
wherein a plurality of combinations of the at least one input data and the plurality of second pattern data correspond to the plurality of Hamming distances, and one of the at least one reference time corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference times, and one of the at least one reference voltage corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference voltages.
4 . The memory searching engine of claim 1 , wherein the at least one input data comprises a plurality of input data in different types, and
wherein a plurality of combinations of the plurality of input data and the at least one second pattern data correspond to the plurality of Hamming distances, and one of the at least one reference time corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference times, and one of the at least one reference voltage corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference voltages.
5 . The memory searching engine of claim 1 , wherein the at least one input data comprises a plurality of input data in different types, the at least one second pattern data comprises a plurality of second pattern data in different types, and
wherein a plurality of combinations of the plurality of input data and the plurality of second pattern data correspond to the plurality of Hamming distances, and one of the at least one reference time corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference times, and one of the at least one reference voltage corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference voltages.
6 . The memory searching engine of claim 1 , wherein each of the first pattern data comprises m features, each of the second pattern data comprises m features, wherein m is an integer.
7 . A reference array, arranged in a memory searching engine, wherein the memory searching engine stores at least one reference time and at least one reference voltage corresponding to a plurality of Hamming distances, and the memory searching engine comprises a data array storing at least one first pattern data,
wherein the reference array is configured to store at least one second pattern data and configured to receive at least one input data, and
wherein the at least one second pattern data is configured to be provided to the memory searching engine, so as to calculate a plurality of updated reference times and a plurality of updated reference voltages corresponding to the plurality of Hamming distances, and allow the memory searching engine to perform a reference calibrating, so as to update the at least one reference time according to the plurality of updated reference times, or update the at least one reference voltage according to the plurality of updated reference voltages.
8 . The reference array of claim 7 , wherein the reference array comprises a plurality of bit lines and a plurality of Not-AND (NAND) strings, the plurality of NAND strings are each coupled between one of the plurality of bit lines and a common source line, and
wherein the plurality of NAND strings are configured to store the at least one second pattern data, and ones of the plurality of NAND strings coupled to the same bit line respectively store a plurality of portions of the at least one second pattern data, and the plurality of portions are same to each other.
9 . The reference array of claim 7 , wherein the at least one second pattern data comprises a plurality of second pattern data in different types, and
wherein a plurality of combinations of the at least one input data and the plurality of second pattern data correspond to the plurality of Hamming distances, and one of the at least one reference time corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference times, and one of the at least one reference voltage corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference voltages.
10 . The reference array of claim 7 , wherein the at least one input data comprises a plurality of input data in different types, and
wherein a plurality of combinations of the plurality of input data and the at least one second pattern data correspond to the plurality of Hamming distances, and one of the at least one reference time corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference times, and one of the at least one reference voltage corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference voltages.
11 . The reference array of claim 7 , wherein the at least one input data comprises a plurality of input data in different types, the at least one second pattern data comprises a plurality of second pattern data in different types, and
wherein a plurality of combinations of the plurality of input data and the plurality of second pattern data correspond to the plurality of Hamming distances, and one of the at least one reference time corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference times, and one of the at least one reference voltage corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference voltages.
12 . The reference array of claim 7 , wherein each of the first pattern data comprises m features, each of the second pattern data comprises m features, wherein m is an integer.
13 . A reference calibrating method, suitable for a memory search engine comprising a data array and a reference array, wherein the memory searching engine stores at least one reference time and at least one reference voltage corresponding to a plurality of Hamming distances, and the data array stores at least one first pattern data, the reference array stores at least one second pattern data, wherein the reference calibrating method comprises:
receiving, by the reference array, at least one input data;
calculating, by the memory search engine, a plurality of updated reference times and a plurality of updated reference voltages corresponding to the plurality of Hamming distances, based on the at least one second pattern data; and
updating, by the memory search engine, the at least one reference time according to the plurality of updated reference times, or the at least one reference voltage according to the plurality of updated reference voltages.
14 . The reference calibrating method of claim 13 , wherein the reference array comprises a plurality of bit lines and a plurality of Not-AND (NAND) strings, the plurality of NAND strings are each coupled between one of the plurality of bit lines and a common source line, and
wherein the plurality of NAND strings are configured to store the at least one second pattern data, and ones of the plurality of NAND strings coupled to the same bit line respectively store a plurality of portions of the at least one second pattern data, and the plurality of portions are same to each other.
15 . The reference calibrating method of claim 13 , wherein the at least one second pattern data comprises a plurality of second pattern data in different types, and
wherein a plurality of combinations of the at least one input data and the plurality of second pattern data correspond to the plurality of Hamming distances, and one of the at least one reference time corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference times, and one of the at least one reference voltage corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference voltages.
16 . The reference calibrating method of claim 13 , wherein the at least one input data comprises a plurality of input data in different types, and
wherein a plurality of combinations of the plurality of input data and the at least one second pattern data correspond to the plurality of Hamming distances, and one of the at least one reference time corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference times, and one of the at least one reference voltage corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference voltages.
17 . The reference calibrating method of claim 13 , wherein the at least one input data comprises a plurality of input data in different types, the at least one second pattern data comprises a plurality of second pattern data in different types, and
wherein a plurality of combinations of the plurality of input data and the plurality of second pattern data correspond to the plurality of Hamming distances, and one of the at least one reference time corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference times, and one of the at least one reference voltage corresponding to each of the plurality of Hamming distances is configured to be updated according to at least one of the plurality of updated reference voltages.