Selective self-assembled monolayer (SAM) removal
Methods of forming microelectronic devices comprise forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom. The methods include forming a hardmask on the dielectric layer; selectively depositing a self-assembled monolayer (SAM) on the bottom of the gap and on the hardmask; treating the microelectronic device with a plasma to remove the self-assembled monolayer (SAM) from the hardmask; forming a barrier layer on the dielectric layer and on the hardmask; selectively depositing a metal liner on the barrier layer on the sidewall; and performing a gap fill process on the metal liner.
1 . A method of forming a microelectronic device, the method comprising:
forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom;
forming a hardmask on the dielectric layer;
selectively depositing a self-assembled monolayer (SAM) on the bottom of the gap and on the hardmask;
treating the microelectronic device with a plasma to remove the self-assembled monolayer (SAM) from the hardmask, the plasma comprising one or more of hydrogen (H 2 ) or Argon (Ar);
forming a barrier layer on the dielectric layer and on the hardmask;
selectively depositing a metal liner on the barrier layer on the sidewall; and
performing a gap fill process on the metal liner,
wherein treating the microelectronic device with the plasma comprises increasing a density of the barrier layer.
2 . The method of claim 1 , wherein the metal liner is deposited at a thickness on the sidewalls that is greater than a thickness of the metal liner deposited on the bottom.
3 . The method of claim 1 , wherein the metal liner is deposited on the sidewalls and not on the bottom.
4 . The method of claim 1 , wherein selectively depositing the SAM comprises exposing the bottom of the gap and the hardmask to a hydrocarbon carried in an argon (Ar) gas.
5 . The method of claim 1 , further comprising removing the SAM from the bottom of the gap after forming the barrier layer on the dielectric layer and the hardmask.
6 . The method of claim 1 , wherein the hardmask comprises one or more of tungsten carbide (WC), titanium nitride (TiN), oxides, and nitrides.
7 . The method of claim 1 , wherein the metal liner comprises one or more of ruthenium (Ru), cobalt (cobalt), molybdenum (Mo), and tantalum (Ta).
8 . The method of claim 7 , wherein the metal liner comprises a single layer of ruthenium (Ru).
9 . The method of claim 7 , wherein the selective ruthenium (Ru) deposition on the sidewall comprises a cyclic deposition process using a ruthenium (Ru) precursor carried by an argon (Ar) gas to form a deposited ruthenium layer.
10 . The method of claim 9 , wherein the cyclic deposition process further comprises annealing the deposited ruthenium layer while flowing hydrogen (H 2 ) and annealing the deposited ruthenium layer.
11 . The method of claim 10 , wherein the cyclic deposition process is performed in a substrate processing chamber at a first pressure to form the deposited ruthenium layer, and annealing the deposited ruthenium layer is performed while the substrate processing chamber is at a second pressure that is greater than the first pressure.
12 . The method of claim 1 , wherein the gap fill process comprises filling the gap with one or more of copper (Cu) or cobalt (Co).
13 . The method of claim 1 , wherein the plasma treatment comprises treating the microelectronic device with a plasma in a depletion mode.
14 . The method of claim 13 , herein the plasma comprises hydrogen (H 2 ).
15 . The method of claim 13 , wherein the plasma is a remote plasma.
16 . The method of claim 13 , wherein the plasma is a capacitively coupled plasma with a pulsed hydrogen (H 2 ) supply.
17 . The method of claim 13 , wherein the depletion mode comprises a low pressure and an abbreviated time treatment.
18 . A method of forming a microelectronic device, the method comprising:
forming a dielectric layer on a substrate, the dielectric layer comprising at least one feature defining a gap including sidewalls and a bottom;
forming a hardmask on the dielectric layer;
selectively depositing a self-assembled monolayer (SAM) on the bottom of the gap and on the hardmask;
treating the microelectronic device with a hydrogen (H 2 ) plasma in a depletion mode to remove the self-assembled monolayer (SAM) from the hardmask;
forming a barrier layer on the dielectric layer and on the hardmask, wherein treating the microelectronic device with the hydrogen (Ha) plasma comprises increasing a density of the barrier layer;
removing the SAM from the bottom of the gap;
selectively depositing a metal liner on the barrier layer on the sidewall; and
performing a gap fill process on the metal liner.
19 . The method of claim 18 , wherein the depletion mode comprises a low pressure and a short time treatment.