IP Library › Granted Patent US 12,625,330
Granted Patent B2
US 12,625,330 · App. 18/503,194 · Granted May 12, 2026

Package structure and manufacturing method thereof

Inventors: John Hon-Shing Lau (Taoyuan City, TW); Tzyy-Jang Tseng (Taoyuan City, TW)
Assignee: Unimicron Technology Corp.
G02B6/4249G02B6/4293
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Quick Facts
Patent No.
US 12,625,330
App. No.
18/503,194
Granted
May 12, 2026
Kind
B2
Abstract

A package structure includes a package substrate, an application specific integrated circuit (ASIC), a plurality of optoelectronic assemblies, and a plurality of organic interposers. The ASIC is disposed on the package substrate and electrically connected to the package substrate. The optoelectronic assemblies are separately disposed on the package substrate and surround the ASIC. Each of the plurality of optoelectronic assemblies includes an electronic integrated circuit (EIC), a photonic integrated circuit (PIC), and a plurality of hybrid bonding pads. The EIC is bonded to the PIC through the plurality of hybrid bonding pads. The plurality of organic interposers are separately disposed on the package substrate and surround the ASIC. The optoelectronic assemblies are electrically connected to the package substrate through the plurality of organic interposers.

Claims (23)

1 . A package structure, comprising:

a package substrate;

an application specific integrated circuit, disposed on the package substrate and electrically connected to the package substrate;

a plurality of optoelectronic assemblies, disposed on the package substrate, separated from each other and surrounding the application specific integrated circuit, wherein each of the plurality of optoelectronic assemblies comprises an electronic integrated circuit, a photonic integrated circuit, and a plurality of hybrid bonding pads, wherein the electronic integrated circuit is hybrid bonded to the photonic integrated circuit through the plurality of hybrid bonding pads; and

a plurality of organic interposers, disposed on the package substrate, separated from each other and surrounding the application specific integrated circuit, wherein the plurality of optoelectronic assemblies are electrically connected to the package substrate through the plurality of organic interposers, and the photonic integrated circuit is between the electronic integrated circuit and the plurality of organic interposers.

2 . The package structure according to claim 1 , wherein each of the plurality of optoelectronic assemblies further comprises an optical fiber cable that is connected to the photonic integrated circuit.

3 . The package structure according to claim 1 , wherein each of the plurality of optoelectronic assemblies further comprises an encapsulant that covers the electronic integrated circuit and the photonic integrated circuit and exposes a bottom surface of the photonic integrated circuit.

4 . The package structure according to claim 1 , further comprising:

a plurality of conductive elements, disposed between the plurality of optoelectronic assemblies and the plurality of organic interposers, wherein the photonic integrated circuit has a plurality of through silicon vias and is electrically connected to each of the corresponding organic interposers through the plurality of through silicon vias and the plurality of conductive elements.

5 . The package structure according to claim 4 , wherein each of the plurality of conductive elements comprises a bump or a Cu-pillar with solder bump cap.

6 . The package structure according to claim 1 , further comprising:

a plurality of first conductive elements, disposed between the application specific integrated circuit and the package substrate, wherein the application specific integrated circuit is electrically connected to the package substrate through the plurality of first conductive elements; and

a plurality of second conductive elements, disposed between the plurality of organic interposers and the package substrate, wherein the plurality of organic interposers are electrically connected to the package substrate through the plurality of second conductive elements.

7 . The package structure according to claim 6 , wherein the package substrate further comprises a connecting circuit, and the plurality of first conductive elements are electrically connected to the plurality of second conductive elements through the connecting circuit.

8 . The package structure according to claim 6 , wherein each of the plurality of first conductive elements and each of the plurality of second conductive elements separately comprises a solder ball.

9 . The package structure according to claim 1 , wherein each of the plurality of organic interposers comprises a redistribution layer structure.

10 . The package structure according to claim 1 , wherein one side of the application specific integrated circuit comprises at least one organic interposer among the plurality of organic interposers and four optoelectronic assemblies among the plurality of optoelectronic assemblies.

11 . A manufacturing method of a package structure, comprising:

providing a plurality of optoelectronic assemblies, each having an electronic integrated circuit, a photonic integrated circuit, and a plurality of hybrid bonding pads, wherein the electronic integrated circuit is hybrid bonded to the photonic integrated circuit through the plurality of hybrid bonding pads;

providing a plurality of organic interposers;

assembling the plurality of optoelectronic assemblies on the plurality of organic interposers;

assembling an application specific integrated circuit on a package substrate, wherein the application specific integrated circuit is electrically connected to the package substrate; and

assembling the plurality of organic interposers and the plurality of optoelectronic assemblies assembled thereon onto the package substrate, wherein the plurality of organic interposers and the plurality of optoelectronic assemblies assembled thereon surround the application specific integrated circuit and are electrically connected to the package substrate, wherein the photonic integrated circuit is between the electronic integrated circuit and the plurality of organic interposers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2023
From: LAU, JOHN HON-SHING; TSENG, TZYY-JANG
To: UNIMICRON TECHNOLOGY CORP.
Reel/Frame 065503/0228 →
Continuity (1)
Related Publication 20250147249A1 · May 8, 2025
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