Power semiconductor device
A power semiconductor device includes a high voltage unit configured to output a high voltage, a low voltage unit configured to output a low voltage, a capacitor electrically connected to the high voltage unit and supplying power to the high voltage unit while the high voltage is output, a switching unit electrically connected to the high voltage unit and the capacitor and configured to connect the capacitor to a driving power source to charge the capacitor while the low voltage is output and to prevent the high voltage unit from being electrically connected to the driving power source while the high voltage is output, and a resistance unit electrically connected between the switching unit and the high voltage unit and configured to drop the high voltage to a voltage lower than a breakdown voltage of the switching unit while the high voltage is output.
1 . A power semiconductor device comprising:
a high voltage unit configured to output a high voltage;
a low voltage unit configured to output a low voltage;
a capacitor electrically connected to the high voltage unit and configured to supply power to the high voltage unit while the high voltage is output;
a switching unit electrically connected to the high voltage unit and the capacitor and configured to connect the capacitor to a driving power source to charge the capacitor while the low voltage is output and to prevent the high voltage unit from being electrically connected to the driving power source while the high voltage is output; and
a resistance unit electrically connected between the switching unit and the high voltage unit and configured to drop the high voltage to a voltage lower than a breakdown voltage of the switching unit while the high voltage is output,
wherein the resistance unit comprises an N-type impurity diffusion region in an upper portion of an N-type epitaxial layer in a substrate and electrically connected between the switching unit and the high voltage unit.
2 . The power semiconductor device of claim 1 , wherein the switching unit comprises a bipolar junction transistor or a diode.
3 . The power semiconductor device of claim 1 , wherein the resistance unit further comprises a field oxide layer disposed on the substrate.
4 . The power semiconductor device of claim 3 , wherein the resistance unit further comprises a P-type impurity diffusion region disposed between the N-type impurity diffusion region and the field oxide layer.
5 . The power semiconductor device of claim 4 , wherein the switching unit comprises a bipolar junction transistor or a diode.
6 . The power semiconductor device of claim 3 ,
wherein the resistance unit further comprises:
a first electrode layer disposed on the field oxide layer adjacent to the switching unit and electrically connected to a ground terminal; and
a second electrode layer disposed on the field oxide layer adjacent to the high voltage unit and electrically connected to the high voltage unit.
7 . The power semiconductor device of claim 1 ,
wherein the resistance unit further comprises:
a first contact region disposed on one side of the N-type impurity diffusion region and electrically connected to the switching unit; and
a second contact region disposed on another side of the N-type impurity diffusion region and electrically connected to the high voltage unit.
8 . The power semiconductor device of claim 7 ,
wherein the resistance unit further comprises:
an N-type buried layer disposed below the second contact region and configured to disperse an electric field generated by the high voltage when the high voltage is applied to the second contact region.
9 . The power semiconductor device of claim 1 ,
wherein the resistance unit comprises:
a field oxide layer disposed on a substrate; and
a resistive layer disposed on the field oxide layer.
10 . The power semiconductor device of claim 9 , wherein the resistive layer includes polysilicon doped with N-type impurities.
11 . The power semiconductor device of claim 9 , wherein the switching unit comprises a bipolar junction transistor or a diode.