Semiconductor devices and methods of fabricating the same
A semiconductor device includes a semiconductor fin protruding from a substrate. The semiconductor device includes a P-type device over the semiconductor fin and an N-type device over the semiconductor fin. The P-type device includes a first source/drain (S/D) feature adjacent a first gate structure. The P-type device includes a dipole layer over the first S/D feature, where the dipole layer includes a first metal and a second metal different from the first metal. The P-type device further includes a first silicide layer over the dipole layer, where the first silicide layer includes the first metal. The N-type device includes a second S/D feature adjacent a second gate structure. The N-type device further includes a second silicide layer directly contacting the second S/D feature, where the second silicide layer includes the first metal, and where a composition of the second silicide layer is different from that of the dipole layer.
1 . A semiconductor device, comprising:
a semiconductor layer protruding from a substrate, the semiconductor layer including a first channel region and a second channel region;
a first source/drain (S/D) feature in the semiconductor layer adjacent the first channel region, the first S/D feature configured as a P-type S/D feature;
a second S/D feature in the semiconductor layer adjacent the second channel region, the second S/D feature configured as an N-type S/D feature;
a first silicide layer over the first S/D feature and including a first metal;
an interfacial layer between the first silicide layer and the first S/D feature, the interfacial layer including the first metal and a second metal different from the first metal, wherein a concentration of the second metal is greater than a concentration of the first metal; and
a second silicide layer over and directly contacting the second S/D feature, the second silicide layer including the first metal.
2 . The semiconductor device of claim 1 , wherein the second metal includes molybdenum, ruthenium, nickel, cobalt, platinum, tungsten, or combinations thereof.
3 . The semiconductor device of claim 1 , wherein the first S/D feature includes silicon germanium and the second S/D feature includes silicon, and wherein the interfacial layer further includes silicon and germanium.
4 . The semiconductor device of claim 3 , wherein the first S/D feature includes a Ge pile-up region adjacent the interfacial layer.
5 . The semiconductor device of claim 1 , wherein a concentration of the first metal in the first silicide layer is greater than a concentration of the first metal in the interfacial layer.
6 . The semiconductor device of claim 1 , wherein the concentration of the second metal is greater than a concentration of the first metal in the interfacial layer near the first S/D feature.
7 . The semiconductor device of claim 1 , wherein the concentration of the second metal increases across the interfacial layer toward the first S/D feature.
8 . The semiconductor device of claim 1 , wherein the concentration of the first metal decreases across the interfacial layer toward the first S/D feature.
9 . A semiconductor device, comprising:
a substrate;
a semiconductor fin protruding from the substrate;
a P-type device over the semiconductor fin, including:
a first gate structure engaging with a first channel region of the semiconductor fin;
a first source/drain (S/D) feature adjacent the first gate structure;
a dipole layer over the first S/D feature and including a first metal and a second metal different from the first metal;
a first silicide layer over the dipole layer, the first silicide layer including the first metal; and
an interfacial layer disposed between the first S/D feature and the first silicide layer; and
an N-type device over the semiconductor fin, including:
a second gate structure engaging with a second channel region of the semiconductor fin;
a second S/D feature adjacent the second gate structure; and
a second silicide layer directly contacting the second S/D feature, the second silicide layer including the first metal and having a composition different from that of the dipole layer.
10 . The semiconductor device of claim 9 , further comprising:
a first S/D contact coupled with the first S/D feature through the dipole layer and the first silicide layer; and
a second S/D contact coupled with the second S/D feature through the second silicide layer.
11 . The semiconductor device of claim 9 , wherein the P-type device and the N-type device are stacked vertically along a direction protruding from the substrate, the semiconductor device further comprising an S/D contact extending along sidewalls of the first S/D feature and the second S/D feature, wherein the S/D contact is coupled with the first S/D feature through the dipole layer and the first silicide layer and with the second S/D feature through the second silicide layer.
12 . The semiconductor device of claim 9 , wherein the first S/D feature includes silicon and germanium, wherein the first S/D feature directly contacts the dipole layer at a first interface, and wherein a concentration of germanium decreases from the first interface toward a bulk portion of the first S/D feature.
13 . The semiconductor device of claim 12 , wherein the dipole layer directly contacts the first silicide layer at a second interface, wherein a concentration of the first metal decreases from the second interface toward the first interface, wherein a concentration of the second metal increases from the second interface toward the first interface, and wherein a concentration of germanium increases from the second interface toward the first interface.
14 . A semiconductor device, comprising:
a substrate;
a first device comprising a first source/drain feature and a first channel region arranged adjacent the first source/drain feature;
a second device comprising a second source/drain feature and a second channel region arranged adjacent the first source/drain feature,
wherein the first device and the second device are stacked vertically along a first direction that protrudes from the substrate;
wherein the second source/drain feature is stacked over the first source/drain feature along the first direction; and
a contact opening extending along sidewalls of the first source/drain feature and the second source/drain feature in the first direction.
15 . The semiconductor device of claim 14 , further comprising:
an etch stop layer disposed over the first source/drain feature and the second source/drain feature; and
an interlayer dielectric disposed over the first source/drain feature and the second source/drain feature.
16 . The semiconductor device of claim 14 , further comprising a first metal layer disposed over the first source/drain feature and a second metal layer disposed over the second source/drain feature.
17 . The semiconductor device of claim 16 , wherein the first metal layer and the second metal layer each comprise a metal halide.
18 . The semiconductor device of claim 14 , further comprising a first dipole layer disposed over the first source/drain feature.
19 . The semiconductor device of claim 18 , further comprising a first silicide layer disposed over the first dipole layer and a second silicide layer disposed over the second source/drain feature.
20 . The semiconductor device of claim 19 , further comprising a contact disposed in the contact opening, wherein the contact is in contact with the first silicide layer and the second silicide layer.