Dummy pattern structure for reducing dishing
View Patent ↗A semiconductor package includes: a first die, a second die and a bonding member arranged between the first and second die, wherein the bonding member is configured to facilitate a bonding between the first and second die and comprises a first area and a second area. The first area is configured with a first set of bonding pads configured to provide electrical connections between the first and second dies. The second area is configured with a second set of bonding pads configured to provide electrical connections between the first and second die, wherein a quantity of bonding pads in the first set is larger than a quantity of bonding pads in the second set. The second area is configured with a dummy structure in one or more spaces where a bonding pad is not present in the second area, the dummy structure not providing an electrical connection.
1 . A semiconductor package comprising:
a first die;
a second die; and
a bonding member arranged between the first and second die, wherein the bonding member is configured to facilitate a bonding between the first and second die and comprises a first area and a second area;
wherein the first area is configured with a first set of bonding pads configured to provide electrical connections between the first and second dies;
wherein the second area is configured with a second set of bonding pads configured to provide electrical connections between the first and second die, a quantity of bonding pads in the first set being larger than a quantity of bonding pads in the second set;
wherein the second area is configured with a dummy structure in one or more spaces where a bonding pad is not present in the second area, the dummy structure not providing an electrical connection between the first and second dies, wherein the dummy structure has a shape selected from the group consisting of an L-shape, an inverse L-shape, and an I-shape configured to occupy the one or more spaces to increase pattern density uniformity within the second area.
2 . The semiconductor package of claim 1 , wherein the dummy structure comprises a number of dummy pads arranged to cause a pattern density in the second area to be substantially the same as a pattern density in the first area.
3 . The semiconductor package of claim 1 , wherein the dummy structure comprises a trench structure filled with a metal, the trench being arranged to cause a pattern density in the second area to be substantially the same as a pattern density in the first area.
4 . The semiconductor package of claim 1 , wherein the dummy structure comprises a material of the bonding pads in the second set, wherein the material comprises at least one of copper, aluminum, or tungsten.
5 . The semiconductor package of claim 1 , wherein the dummy structure has a polygonal, non-angular, and/or combination polygonal shape.
6 . The semiconductor package of claim 1 , wherein a gap between the dummy structure and a neighboring bonding pad in the second set is greater than 0.1 um.
7 . The semiconductor package of claim 1 , wherein the dummy structure comprises a first portion and a second portion, the first portion being bonded to the second portion vertically in the bonding member.
8 . The semiconductor package of claim 7 , wherein the first portion has an equal size to the second portion.
9 . The semiconductor package of claim 7 , wherein the first portion has an unequal size to the second portion.
10 . A semiconductor package comprising:
a first die;
a second die stacked on the first die; and
a hybrid bonding member arranged between the first die and the second die, the hybrid bonding member comprising a dielectric material, bonding pads and a dummy structure;
wherein the bonding pads are configured to provide electrical connections between the first and second dies and are surrounded by the dielectric material in the hybrid bonding member;
wherein the dummy structure is configured in one or more spaces where a bonding pad is not present in the hybrid bonding member, the dummy structure not providing an electrical connection between the first and second dies;
wherein the hybrid bonding member comprises a first area having a first pattern density defined by a first subset of the bonding pads therein and a second area having fewer bonding pads from a second subset of the bonding pads than the first subset, the dummy structure being located in the second area and having a shape selected from the group consisting of an L-shape, an inverse L-shape, and an I-shape configured to occupy the one or more spaces to increase pattern density uniformity within the second area relative to the first area.
11 . The semiconductor package device of claim 10 , wherein a gap between the dummy structure and a neighboring bonding pad is greater than 0.1 um.
12 . The semiconductor package of claim 10 , wherein the dummy structure comprises a first portion and a second portion, the first portion being bonded to the second portion vertically in the hybrid bonding member.
13 . The semiconductor package of claim 12 , wherein the first portion has an equal size to the second portion.
14 . A method for fabricating a semiconductor package, comprising:
arranging bonding pads in a first portion of a bonding member on a first die, the bonding member comprising the first area and a second area;
arranging bonding pads in a second portion of the bonding member on a second die;
arranging a first portion of a dummy structure in the first portion of the bonding member;
arranging a second portion of the dummy structure in the second portion of the bonding member; and
bonding the first die and second die at the first portion and the second portion of the bonding member;
wherein the first area is configured with a first set of bonding pads configured to provide electrical connections between the first and second dies;
wherein the second area is configured with a second set of bonding pads configured to provide electrical connections between the first and second die, a quantity of bonding pads in the first set being larger than a quantity of bonding pads in the second set;
wherein the dummy structure is arranged in one or more spaces in the second area where a bonding pad is not present in the second area, the dummy structure not providing an electrical connection between the first and second die;
wherein the dummy structure has a shape selected from the group consisting of an L-shape, an inverse L-shape, and an I-shape configured to occupy the one or more spaces to increase pattern density uniformity within the second area.
15 . The method of claim 14 , the dummy structure comprises a number of dummy pads arranged to cause a pattern density in the second area to be substantially the same as a pattern density in the first area.
16 . The method of claim 14 , wherein the dummy structure comprises a trench structure filled with a metal, the trench being arranged to cause a pattern density in the second area to be substantially the same as a pattern density in the first area.
17 . The method of claim 14 , wherein a gap between the dummy structure and a neighboring bonding pad in the second set is greater than 0.1 um.
18 . The method of claim 14 , wherein the first portion of the bonding member has an equal size to the second portion of the bonding member.
19 . The method of claim 14 , wherein the dummy structure has a polygonal, non-angular, and/or combination polygonal shape.
20 . The method of claim 14 , wherein the dummy structure comprises a trench structure filled with a metal, the trench being arranged to cause a pattern density in the second area to be substantially the same as a pattern density in the first area.