IP Library › Granted Patent US 12,640,661
Granted Patent B2
US 12,640,661 · App. 18/618,086 · Granted May 26, 2026

System and method for mutual inductance cancellation for two-level converters

Inventors: Yilun Luo (Ann Arbor, MI); Chandra S. Namuduri (Troy, MI); Rashmi Prasad (Troy, MI); Khorshed Mohammed Alam (Canton, MI); Junghoon Kim (Carlisle, OH)
Assignee: GM Global Technology Operations LLC
H02M7/003H02M1/007H02M7/537H02M1/32
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Quick Facts
Patent No.
US 12,640,661
App. No.
18/618,086
Granted
May 26, 2026
Kind
B2
Abstract

A two-level power converter assembly includes a positive bus having a positive DC power bus, at least one high side semiconductor switch, and an AC bus high side output from the at least one high side semiconductor switch. The assembly also includes a negative bus having a negative DC power bus, at least one low side semiconductor switch, and an AC bus low side output from the at least one low side semiconductor switch. The positive bus is laterally offset and overlapping with the negative bus and the at least one high side semiconductor switch is connected in series with the at least one low side semiconductor switch between the positive bus and the negative bus. A first node connects the AC bus high side output to the AC bus low side output and the first node includes a first AC phase leg output.

Claims (45)

1 . A two-level power converter assembly, comprising:

a positive bus including a positive DC power bus, at least one high side semiconductor switch, and an AC bus high side output from the at least one high side semiconductor switch;

a negative bus including a negative DC power bus, at least one low side semiconductor switch, and an AC bus low side output from the at least one low side semiconductor switch, wherein the positive bus is laterally offset and overlapping with the negative bus and the at least one high side semiconductor switch is connected in series with the at least one low side semiconductor switch between the positive bus and the negative bus; and

a first node connecting the AC bus high side output to the AC bus low side output, wherein the first node includes a first AC phase leg output.

2 . The two-level power converter assembly of claim 1 , wherein the positive bus and the negative bus are arranged in a coplanar configuration.

3 . The two-level power converter assembly of claim 1 , wherein the positive bus and the negative bus are arranged in a stacked configuration.

4 . The two-level power converter assembly of claim 1 , including a second positive bus coplanar with the positive bus and the negative bus and separated from the positive bus by the negative bus.

5 . The two-level power converter assembly of claim 1 , including a second negative bus coplanar with the positive bus and the negative bus and separated from the negative bus by the positive bus.

6 . The two-level power converter assembly of claim 1 , wherein the positive DC power bus and the at least one high side semiconductor switch are arranged linearly and the negative DC power bus and the at least one low side semiconductor switch are arranged linearly and parallel to the positive DC power bus and the at least one high side semiconductor.

7 . The two-level power converter assembly of claim 1 ,

wherein the at least one high side semiconductor switch includes a first high side semiconductor switch and a second high side semiconductor switch;

wherein the at least one low side semiconductor switch includes a first low side semiconductor switch and a second low side semiconductor switch;

wherein the first high side semiconductor switch is connected to the first low side semiconductor switch at the first node with the first high side semiconductor switch and the first low side semiconductor switch connected in series between the positive bus and the negative bus; and

wherein the second high side semiconductor switch is connected to the second low side semiconductor switch at a second node with the second high side semiconductor switch and the second low side semiconductor switch connected in series between the positive bus and the negative bus.

8 . The two-level power converter assembly of claim 7 , wherein the second node includes a second AC phase leg output.

9 . The two-level power converter assembly of claim 8 , wherein the positive bus and the negative bus are arranged in a stacked configuration with the first high side semiconductor switch and the second high side semiconductor switch are arranged in a first tier and the second high side semiconductor switch and the second low side semiconductor switch are located in a second tier.

10 . The two-level power converter assembly of claim 8 , wherein the positive DC power bus and the negative DC power bus are arranged on a first end of the two-level power converter and the first AC phase leg output and the second AC phase leg output are arranged on a second end of the two-level power converter.

11 . The two-level power converter assembly of claim 8 , wherein the at least one high side semiconductor switch and the at least one low side semiconductor switch are each a gallium nitride (GaN) device.

12 . A multiphase power inverter assembly, comprising:

a positive DC power bus;

a negative DC power bus laterally offset and overlapping with the positive DC power bus;

a first two-level power converter including a high side semiconductor switch and a low side semiconductor switch, wherein the high side semiconductor switch is connected in series with the low side semiconductor switch at a first AC leg node of the first two-level power converter between the positive DC power bus and the negative DC power bus;

a second two-level power converter including a high side semiconductor switch and a low side semiconductor switch, wherein the high side semiconductor switch is connected in series with the low side semiconductor switch at a second AC leg node of the second two-level power converter between the positive DC power bus and the negative DC power bus; and

a third two-level power converter including a high side semiconductor switch and a low side semiconductor switch, wherein the high side semiconductor switch is connected in series with the low side semiconductor switch at a third AC leg node of the third two-level power converter between the positive DC power bus and the negative DC power bus;

wherein the positive DC power bus and the high side semiconductor switches in the first, second, and third two-level power converters are laterally offset and overlapping with the negative DC power bus and the low side semiconductor switches of the first, second, and third two-level power converters.

13 . The multiphase power inverter assembly of claim 12 , wherein the positive DC power bus and the high side semiconductor switches are arranged linearly and the negative DC power bus and the low side semiconductor switches are arranged linearly and parallel to the positive DC power bus and the high side semiconductor switches.

14 . The multiphase power inverter assembly of claim 13 , wherein the positive DC power bus and the negative DC power bus are arranged in a coplanar configuration.

15 . The multiphase power inverter assembly of claim 14 , wherein the positive DC power bus and the negative DC power bus are arranged in a stacked configuration.

16 . The multiphase power inverter assembly of claim 13 , wherein the positive DC power bus and the negative DC power bus are arranged on a first end of the multiphase power inverter assembly and the first AC leg node, the second AC leg node, and the third AC leg node are arranged on a second end of the multiphase power inverter assembly.

17 . The multiphase power inverter assembly of claim 12 , wherein:

the first two-level power converter includes a second high side semiconductor switch and a second low side semiconductor switch, wherein the second high side semiconductor switch is connected in series with the second low side semiconductor switch at a fourth phase leg node of the first two-level power converter between the positive DC power bus and the negative DC power bus;

the second two-level power converter includes a second high side semiconductor switch and a second low side semiconductor switch, wherein the second high side semiconductor switch is connected in series with the second low side semiconductor switch at a fifth phase leg node of the second two-level power converter between the positive DC power bus and the negative DC power bus; and

the third two-level power converter includes a second high side semiconductor switch and a second low side semiconductor switch, wherein the second high side semiconductor switch is connected in series with the second low side semiconductor switch at a sixth phase leg node of the third two-level power converter between the positive DC power bus and the negative DC power bus.

18 . A vehicle system including:

a DC power source;

a positive DC power bus in electrical communication with the DC power source;

a negative DC power bus in electrical communication with the DC power source;

a multi-phase power inverter in electrical communication with the positive DC power bus and the negative DC power bus, wherein the multi-phase power inverter includes:

a first two-level power converter including a high side semiconductor switch and a low side semiconductor switch, wherein the high side semiconductor switch is connected in series with the low side semiconductor switch at a first AC leg node of the first two-level power converter between the positive DC power bus and the negative DC power bus;

a second two-level power converter including a high side semiconductor switch and a low side semiconductor switch, wherein the high side semiconductor switch is connected in series with the low side semiconductor switch at a second AC leg node of the second two-level power converter between the positive DC power bus and the negative DC power bus; and

a third two-level power converter including a high side semiconductor switch and a low side semiconductor switch, wherein the high side semiconductor switch is connected in series with the low side semiconductor switch at a third AC leg node of the third two-level power converter between the positive DC power bus and the negative DC power bus;

wherein the positive DC power bus and the high side semiconductor switches in the first, second, and third two-level power converters are laterally offset and overlapping with the negative DC power bus and the low side semiconductor switches of the first, second, and third two-level power converters; and

an electric machine in electrical communication the first AC leg node, the second AC leg node, and the third AC leg node.

19 . The vehicle system of claim 18 , wherein the positive DC power bus and the high side semiconductor switches are arranged linearly and the negative DC power bus and the low side semiconductor switches are arranged linearly and parallel to the positive DC power bus and the high side semiconductor switches.

20 . The vehicle system of claim 19 , wherein the positive DC power bus and the negative DC power bus are arranged in one of a coplanar configuration or a stacked configuration.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2024
From: LUO, YILUN; NAMUDURI, CHANDRA S.; PRASAD, RASHMI; ALAM, KHORSHED MOHAMMED; KIM, JUNGHOON
To: GM GLOBAL TECHNOLOGY OPERATIONS LLC
Reel/Frame 066918/0964 →
Continuity (1)
Related Publication 20250309779A1 · Oct 2, 2025
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