Semiconductor device and method of monitoring a temperature thereof
A semiconductor device includes a temperature-independent current generator that generates a reference current substantially independent of temperature and a mirror current that is a substantial duplicate of the reference current, a pulse signal generator that samples the mirror current so as to generate a pulse signal, and a counter that obtains a number of pulse signals generated by the pulse signal generator, that permits the pulse signal generator to generate a pulse signal when it is determined thereby that the number of pulse signals obtained thereby is less than a predetermined threshold value, and that inhibits the pulse signal generator from generating a pulse signal when it is determined thereby that the number of pulse signals obtained thereby is equal to the predetermined threshold value. A method for monitoring a temperature of the semiconductor device is also disclosed.
1 . A semiconductor device comprising:
a temperature-independent current generator configured to generate a reference current substantially independent of temperature and a first current, a second current, and a third current that are substantial duplicates of the reference current;
a temperature-dependent current generator configured to generate a temperature-dependent current based on the second current and the third current received thereby; and
a first counter responsive to the first current and configured to generate a first chop signal, wherein the temperature-dependent current generator is configured to reduce a current mismatch between the second current and the third current responsive to the first chop signal.
2 . The semiconductor device of claim 1 , further comprising a first pulse signal generator, including:
a first switch coupled between the temperature-independent current generator and a node;
a second switch coupled to the node;
a capacitor coupled in parallel with the second switch; and
a comparator having a first comparator input coupled to the node, a second comparator input configured to receive a reference voltage, and a comparator output coupled to the first counter.
3 . The semiconductor device of claim 1 , wherein the temperature-independent current generator is further configured:
to generate a proportional to absolute temperature (PTAT) current and a complementary to absolute temperature (CTAT) current; and
to combine the PTAT current and the CTAT so as to generate the reference current.
4 . The semiconductor device of claim 1 , further comprising:
a first pulse signal generator coupled to the temperature-independent current generator and configured to sample the first current so as to generate a pulse signal, wherein the first counter is coupled to the first pulse signal generator and configured to obtain a number of pulse signals generated by the first pulse signal generator;
a second pulse signal generator coupled to the temperature-dependent current generator and configured to sample the temperature-dependent current so as to generate a second pulse signal; and
a second counter coupled to the second pulse signal generator and configured to count a number of second pulse signals generated by the second pulse signal generator.
5 . The semiconductor device of claim 4 , wherein the second pulse signal generator includes:
a first switch coupled between the temperature-dependent current generator and a node;
a second switch coupled to the node;
a capacitor coupled in parallel with the second switch; and
a comparator having a first comparator input coupled to the node, a second comparator input configured to receive a reference voltage, and a comparator output coupled to the second counter.
6 . The semiconductor device of claim 1 , wherein the temperature-dependent current generator is further configured:
to generate one of a PTAT voltage and a CTAT voltage based on the second current;
to convert the one of the PTAT voltage and the CTAT voltage into the one of a PTAT current and a CTAT current; and
to subtract the one of the PTAT current and the CTAT current from the third current so as to extract the temperature-dependent current.
7 . The semiconductor device of claim 1 , wherein the temperature-dependent current generator further includes a current mismatch correction circuit configured to reduce a current mismatch and the first counter is configured to generate the first chop signal for reception by and for periodically reversing a polarity of the current mismatch correction circuit.
8 . The semiconductor device of claim 1 , wherein the temperature-dependent current generator further includes a voltage offset correction circuit configured to reduce a voltage offset and the first counter is further configured to generate a second chop signal for reception by and for periodically reversing a polarity of the voltage offset correction circuit.
9 . The semiconductor device of claim 1 , wherein the temperature-dependent current generator includes:
an operational amplifier coupled between first and second nodes;
a first element coupled to the first node; and
a second element coupled to the second node, wherein the first element has a negative temperature coefficient.
10 . The semiconductor device of claim 1 , wherein the temperature-dependent current generator includes:
an operational amplifier coupled between first and second nodes;
a first element coupled to the first node; and
a second element coupled to the second node, wherein the first element has a positive temperature coefficient.
11 . The semiconductor device of claim 1 , wherein the temperature-dependent current generator includes:
an operational amplifier having a first input configured to receive the second current;
a first resistor coupled between the first input of the operational amplifier and an electrical ground;
a second resistor coupled between a second input of the operational amplifier and the electrical ground; and
a transistor configured to receive the third current and coupled between the second input and an output of the operational amplifier.
12 . The semiconductor device of claim 1 , wherein the temperature-dependent current generator includes:
an operational amplifier having a first input configured to receive the second current;
a first transistor or a diode coupled between the first input of the operational amplifier and an electrical ground;
a resistor coupled between a second input of the operational amplifier and the electrical ground; and
a second transistor configured to receive the third current and coupled between the second input and an output of the operational amplifier.
13 . A semiconductor device comprising:
a temperature-dependent current generator configured to:
receive a first current, a second current, and a third current which are generated by a temperature-independent current generator and substantially independent of temperature; and
generate a temperature-dependent current dependent of temperature based on the second current and the third current; and
a first counter responsive to the first current and configured to generate a first chop signal, wherein the temperature-dependent current generator is configured to reduce a current mismatch between the second current and the third current responsive to the first chop signal.
14 . The semiconductor device of claim 13 , further comprising:
a second pulse signal generator coupled to the temperature-dependent current generator and configured to sample the temperature-dependent current so as to generate a pulse signal; and
a second counter coupled to the second pulse signal generator and configured to obtain a number of pulse signals generated by the second pulse signal generator.
15 . The semiconductor device of claim 13 , wherein the temperature-dependent current generator further includes a current mismatch correction circuit configured to reduce a current mismatch and the first counter is configured to generate the first chop signal for reception by and for periodically reversing a polarity of the current mismatch correction circuit.
16 . The semiconductor device of claim 13 , wherein the temperature-dependent current generator further includes a voltage offset correction circuit configured to reduce a voltage offset and the first counter is further configured to generate a second chop signal for reception by and for periodically reversing a polarity of the voltage offset correction circuit.
17 . A method of monitoring a temperature of a semiconductor device, comprising:
generating, by a temperature-independent current generator, a reference current substantially independent of temperature, and first, second, and third currents that are substantial duplicates of the reference current; and
generating, by a temperature-dependent current generator, a temperature-dependent current dependent of temperature based on the second and third currents received thereby;
generating, by a first counter, a chop signal responsive to the first current; and
reducing, by the temperature-dependent current generator, a current mismatch between the second and third currents responsive to the chop signal.
18 . The method of claim 17 , further comprising:
sampling the first current to generate first pulse signals;
counting a number of the first pulse signals to generate a first digital code;
sampling the temperature-dependent current to generate second pulse signals; and
counting a number of the second pulse signals to generate a second digital code, whereby a temperature of the semiconductor device is monitored using the first and second digital codes.
19 . The method of claim 17 , further comprising:
generating a CTAT voltage based on the second current;
converting the CTAT voltage to a CTAT current; and
subtracting the CTAT current from the third current to extract the temperature-dependent current.
20 . The method of claim 17 , further comprising:
generating a PTAT voltage based on the second current;
converting the PTAT voltage to a PTAT current; and
subtracting the PTAT current from the third current to extract the temperature-dependent current.