Method of forming a semiconductor structure including bonding a plurality of first semiconductor dies to a plurality of second semiconductor dies
A semiconductor structure and a method of manufacturing a semiconductor structure are provided. First semiconductor dies are formed from a first substrate, each of the first semiconductor die including an interconnect structure having a first dielectric material. A first thinning operation is performed on each of the first semiconductor dies. Second semiconductor dies are formed from a second substrate. The first semiconductor dies are bonded to a third substrate. A first gap between the first semiconductor dies is filled with a second dielectric material. The second semiconductor dies are bonded to the first semiconductor dies through a second bonding film, each of the first semiconductor dies electrically connected to each of the corresponding second semiconductor dies. A second gap between the second semiconductor dies is filled with a third dielectric material, at least one of the second and third dielectric materials different from the first dielectric material.
1 . A method of forming a semiconductor structure, comprising:
forming a plurality of first semiconductor dies from a first substrate, each of the plurality of first semiconductor dies including an interconnect structure having a first dielectric material;
forming a plurality of second semiconductor dies from a second substrate;
bonding a frontside of the plurality of first semiconductor dies to a third substrate through a first bonding film, wherein the first bonding film includes a non-conductive material that interfaces an entirety of the frontside of the plurality of first semiconductor dies;
after bonding the plurality of first semiconductor dies to the third substrate, performing a first thinning operation to a backside of each of the first semiconductor dies;
filling a first gap between adjacent ones of the first semiconductor dies with a second dielectric material;
bonding the plurality of second semiconductor dies to the plurality of first semiconductor dies through a second bonding film, each of the plurality of first semiconductor dies electrically connected to one of the plurality of second semiconductor dies; and
filling a second gap between adjacent ones of the second semiconductor dies with a third dielectric material, wherein at least one of the second and third dielectric materials is different from the first dielectric material.
2 . The method according to claim 1 , wherein the first dielectric material includes silicon oxide.
3 . The method according to claim 1 , wherein the at least one of the second and third dielectric materials includes a coefficient of thermal expansion (CTE) less than twice of that of the first dielectric material.
4 . The method according to claim 3 , wherein the at least one of the second and third dielectric materials includes a polymer-based material.
5 . The method according to claim 1 , wherein the bonding of the plurality of first semiconductor dies to the third substrate comprises performing a fusion bonding process by forming silicon-oxygen bonds between the first bonding film and the third substrate.
6 . The method according to claim 1 , wherein the bonding of the plurality of second semiconductor dies to the plurality of first semiconductor dies comprises forming metallic bonds and silicon-oxygen bonds between the second bonding film and the plurality of second semiconductor dies.
7 . The method according to claim 1 , further comprising performing a dicing operation after filling the second gap.
8 . The method according to claim 1 , wherein the second bonding film includes oxide and has a first surface and a second surface opposite the first surface, wherein the second surface contacts an entirety of each of an upper surface of the plurality of first semiconductor dies, and wherein the first surface contacts an entirety of each of a lower surface of the plurality of second semiconductor dies.
9 . The method according to claim 1 , wherein the first thinning operation generates a chipped area on a corner of at least one of the first semiconductor dies, and wherein the second dielectric material fills the chipped area.
10 . The method according to claim 1 , further comprising:
removing the first bonding film from the plurality of first semiconductor dies; and
mounting a solder bump to each of the plurality of first semiconductor dies on a surface of the plurality of first semiconductor dies opposite the second bonding film.
11 . A method of forming a semiconductor structure, comprising:
forming a first semiconductor die from a first substrate, the first semiconductor die including an interconnect structure having conductive members and a first dielectric material surrounding the conductive members;
bonding a frontside of the first semiconductor die to a second substrate using a non-conductive material that interfaces an entirety of the frontside of the first semiconductor die;
performing a first thinning operation to a backside of the first semiconductor die, wherein the first thinning operation creates a chipped area on the first semiconductor die;
surrounding the first semiconductor die laterally and filling the chipped area with a second dielectric material different from the first dielectric material, wherein a ratio of coefficients of thermal expansion (CTE) between the second dielectric material to the first dielectric material is between about one and about two;
forming a second semiconductor die from a third substrate;
depositing a bonding layer on the first semiconductor die;
bonding the second semiconductor die to the first semiconductor die by contacting a surface of the second semiconductor die to the bonding layer; and
molding the first and second semiconductor dies with a molding material.
12 . The method according to claim 11 , wherein the second dielectric material includes at least one of an epoxy molding compound and polyimide.
13 . The method according to claim 12 , wherein the second dielectric material is the same as the molding material.
14 . The method according to claim 11 , further comprising performing a second thinning operation on the first semiconductor die after the surrounding the first semiconductor die with the second dielectric material.
15 . The method according to claim 11 , further comprising bonding a third semiconductor die to the first semiconductor die adjacent to the second semiconductor die, wherein the third semiconductor die is electrically insulated from the first and second semiconductor dies.
16 . The method according to claim 11 , wherein the bonding of the second semiconductor die to the first semiconductor die causes a conductive pad of the second semiconductor die to be electrically connected to a through-silicon via of the first semiconductor die.
17 . The method according to claim 11 , wherein the second dielectric material includes an organic polymer with embedded inorganic fillers.
18 . A method, comprising:
providing a semiconductor substrate including a plurality of interposer devices, wherein the plurality of interposer devices include a substrate layer and an interconnect structure over the substrate layer, and wherein the interconnect structure includes a dielectric material;
bonding front sides of a plurality of semiconductor die to the plurality of interposer devices;
performing a first thinning operation to a backside of the plurality of semiconductor die;
depositing a gap-filling material to fill one or more gaps between adjacent semiconductor die of the plurality of semiconductor die;
performing a second thinning operation to the backside of the plurality of semiconductor die, wherein after the second thinning operation, the backside of the plurality of semiconductor die is level with a top surface of the gap-filling material;
after performing the second thinning operation, attaching a carrier substrate to the backside of the plurality of semiconductor die and the top surface of the gap-filling material; and
performing a third thinning operation to the interconnect structure of the plurality of interposer devices to expose conductive vias of the interconnect structure;
wherein the gap-filling material has a different composition than the dielectric material.
19 . The method according to claim 18 , wherein the gap-filling material has a coefficient of thermal expansion (CTE) greater than that of the dielectric material.
20 . The method according to claim 18 , further comprising:
after performing the second thinning operation, performing a singulation operation to form a plurality of individual semiconductor die that each include an interposer device, of the plurality of interposer devices, and at least two semiconductor die, of the plurality of semiconductor die, bonded and electrically connected to the interposer device.