Semiconductor device, electronic device, and vehicle
A semiconductor device includes: an output transistor of a split-gate type configured to have a plurality of channel regions controlled individually according to a plurality of gate control signals; an active clamp circuit configured to limit the terminal-to-terminal voltage across the output transistor to or below a predetermined clamp voltage after a control signal turns to a logic level requesting the output transistor to be off; a delay circuit configured to generate a delayed internal signal by giving a predetermined delay to an internal signal indicating whether the terminal-to-terminal voltage across the output transistor is higher than a predetermined threshold voltage lower than the clamp voltage; and a gate control circuit configured to control the plurality of gate control signals individually so as to raise the on resistance of the output transistor according to the delayed internal signal.
1 . A semiconductor device, comprising:
an output transistor of a split-gate type configured to have a plurality of channel regions controlled individually according to a plurality of gate control signals;
an active clamp circuit configured to limit a terminal-to-terminal voltage across the output transistor to or below a predetermined clamp voltage after a control signal turns to a logic level requesting the output transistor to be off;
a delay circuit configured to generate a delayed internal signal by giving a predetermined delay to an internal signal indicating whether the terminal-to-terminal voltage across the output transistor is higher than a predetermined threshold voltage lower than the clamp voltage; and
a gate control circuit configured to control the plurality of gate control signals individually so as to raise an on resistance of the output transistor according to the delayed internal signal.
2 . The semiconductor device according to claim 1 ,
the delay circuit includes:
a capacitor; and
a charge current generator configured to generate a charge current for the capacitor according to the internal signal, and
the delay circuit outputs as the delayed internal signal a charge voltage across the capacitor.
3 . The semiconductor device according to claim 2 ,
the charge current generator includes:
a current mirror configured to generate the charge current according to a reference current; and
a discharge switch circuit configured to switch whether to discharge the capacitor according to the internal signal.
4 . The semiconductor device according to claim 3 ,
the current mirror receives the internal signal as a driving voltage for driving an output stage for the charge current.
5 . The semiconductor device according to claim 1 ,
the active clamp circuit includes:
a transistor configured to be connected between a drain and a gate of the output transistor;
at least one Zener diode configured to have a cathode connected to a drain of the transistor; and
at least one diode configured to have an anode connected to an anode of the Zener diode and to have a cathode connected to a gate of the transistor.
6 . The semiconductor device according to claim 5 ,
the internal signal is an internal node voltage in the active clamp circuit.
7 . The semiconductor device according to claim 1 ,
the output transistor has a non-clamp gate to which the active clamp circuit is not connected, and the gate control circuit disables the non-clamp gate according to the delayed internal signal.
8 . The semiconductor device according to claim 1 ,
the output transistor functions as
a high-side switch that switches between a conducting state and a cut-off state a path between a power terminal and a load or
a low-side switch that switches between a conducting state and a cut-off state a path between the load and a ground terminal.
9 . An electronic device, comprising:
the semiconductor device according to claim 1 ; and
a load connected to the semiconductor device.
10 . A vehicle, comprising:
the electronic device according to claim 9 .