Semiconductor device including two or more semiconductor structures that are stacked one on another and method for fabricating the same
A semiconductor device includes: a first semiconductor structure including a first bonding dielectric layer that is positioned in an uppermost portion of the first semiconductor structure and that includes a first opening; a second semiconductor structure positioned over the first semiconductor structure and including a second bonding dielectric layer that is positioned in a lowermost portion of the second semiconductor structure and that includes a second opening connected to the first opening; a diffusion barrier layer formed along inner walls of the first and second openings; and a metal-containing layer filling the first and second openings where the diffusion barrier layer is formed.
1 . A semiconductor device, comprising:
a first semiconductor structure including a first bonding dielectric layer that is positioned in an uppermost portion of the first semiconductor structure and that includes a first opening;
a second semiconductor structure positioned over the first semiconductor structure and including a second bonding dielectric layer that is positioned in a lowermost portion of the second semiconductor structure and that includes a second opening connected to the first opening;
a diffusion barrier layer formed along inner walls of the first and second openings; and
a metal-containing layer filling the first and second openings where the diffusion barrier layer is formed,
wherein the first opening extends from the first bonding dielectric layer to penetrate at least a portion of the first semiconductor structure, and
the second opening extends from the second bonding dielectric layer to penetrate at least a portion of the second semiconductor structure.
2 . The semiconductor device of claim 1 , wherein the first bonding dielectric layer and the second bonding dielectric layer directly contact each other to form an insulator-to-insulator bonding.
3 . The semiconductor device of claim 1 , wherein the diffusion barrier layer surrounds a sidewall of the metal-containing layer.
4 . The semiconductor device of claim 1 , wherein a first portion of an upper surface of the metal-containing layer that is buried in the first opening faces the second bonding dielectric layer, and
the diffusion barrier layer is interposed between the second bonding dielectric layer and the first portion.
5 . The semiconductor device of claim 1 , wherein a first portion of a bottom surface of the metal-containing layer buried in the second opening faces the first bonding dielectric layer, and
the diffusion barrier layer is interposed between the first bonding dielectric layer and the first portion.
6 . The semiconductor device of claim 1 , wherein the first semiconductor structure includes a first additional bonding pad which is positioned at substantially the same level as the first bonding dielectric layer,
the second semiconductor structure includes a second additional bonding pad which is positioned at substantially the same level as the second bonding dielectric layer,
a planar area of the first opening in the first bonding dielectric layer is greater than a planar area of the first additional bonding pad, and
a planar area of the second opening in the second bonding dielectric layer is greater than a planar area of the second additional bonding pad.
7 . A method for fabricating a semiconductor device, comprising:
providing an initial first semiconductor structure that includes first sacrificial pads positioned in an uppermost portion of the initial first semiconductor structure, a first bonding dielectric layer filling a space between the first sacrificial pads, and a first sacrificial through electrode penetrating at least a portion of the initial first semiconductor structure except for the uppermost portion and connected to the first sacrificial pads;
forming an initial second semiconductor structure that includes second sacrificial pads positioned in a lowermost portion of the initial second semiconductor structure, a second bonding dielectric layer filling a space between the second sacrificial pads, and a second sacrificial through electrode penetrating a portion of the initial second semiconductor structure except for the lowermost portion and connected to the second sacrificial pads, over the initial first semiconductor structure;
forming first and second openings by removing the first and second sacrificial pads and the first and second sacrificial through electrodes;
forming a diffusion barrier layer along inner walls of the first and second openings; and
forming a metal-containing layer filling the first and second openings in which the diffusion barrier layer is formed.
8 . The method of claim 7 , wherein the initial first semiconductor structure further includes a first additional bonding pad formed in the uppermost portion thereof, and
the initial second semiconductor structure further includes a second additional bonding pad formed in the uppermost portion thereof.
9 . The method of claim 8 , wherein the forming of the initial second semiconductor structure includes:
directly contacting the second bonding dielectric layer to the first bonding dielectric layer, directly contacting the second sacrificial pads to the first sacrificial pads, and directly contacting the first additional bonding pad to the second additional bonding pad; and
forming a metal-to-metal bonding between the first additional bonding pad and the second additional bonding pad while forming an insulator-to-insulator bonding between the first bonding dielectric layer and the second bonding dielectric layer by performing a heat treatment process.
10 . The method of claim 7 , wherein the first sacrificial pads and the second sacrificial pads are misaligned.