Display device
A display device employs first scan signals having a turn-on level that determines when pixels receive data voltages and second scan signals having a turn-on level that determines times for initializing anode voltages of light emitting elements in the pixels. An active period in a frame period is from a time when the pixels receive an initial first scan signal at the turn-on level to when the pixels receive a last first scan signal of the turn-on level. A blank period in the frame period is from when the pixels receive the last first scan signal at the last turn-on level to when the pixels receive an initial first scan signal of the turn-on level during a next frame period. The blank period is at least as long as a cycle in which each of the pixels receives the second scan signals at the turn-on level.
1 . A display device comprising:
pixels including light emitting elements that emit light with luminance based on received data voltages;
a first scan driver that provides first scan signals at a turn-on level that determines times at which the pixels receive the data voltages; and
a second scan driver that provides second scan signals at a turn-on level that determines times for initializing anode voltages of the light emitting elements, wherein
each frame period includes an active period and a blank period,
the active period is a period from a time when the pixels receive an initial first scan signal at the turn-on level to a time when the pixels receive a last first scan signal at the turn-on level,
the blank period is a period from the time when the pixels receive the last first scan signal at the turn-on level to a time when the pixels receive an initial first scan signal at the turn-on level of a next frame period, and
a length of the blank period is larger than or equal to a cycle in which each of the pixels receives the second scan signals at the turn-on level.
2 . The display device of claim 1 , wherein:
the length of the blank period is an integer times of the cycle in which each of the pixels receives the second scan signals at the turn-on level.
3 . The display device of claim 1 , wherein
each of the pixels receives the first scan signals at the turn-on level one time during one frame period,
each of the pixels receives the second scan signals at the turn-on level N times during the one frame period, and
the N is an integer greater than 3.
4 . The display device of claim 3 , wherein
the length of the blank period is (N−3) times of the cycle in which each of the pixels receives the second scan signals at the turn-on level.
5 . The display device of claim 4 , wherein
the N is 4, and
the length of the blank period is one time of the cycle in which each of the pixels receives the second scan signals at the turn-on level.
6 . The display device of claim 4 , wherein
the N is 5, and
the length of the blank period is two times the cycle in which each of the pixels receives the second scan signals at the turn-on level.
7 . The display device of claim 1 , wherein
a number of pixels that simultaneously receive the second scan signals at the turn-on level remains the same throughout the frame periods.
8 . A display device comprising:
pixels including light emitting elements that emit light with luminance based on received data voltages;
a first scan driver that provides first scan signals at a turn-on level that determines times at which the pixels receive the data voltages; and
a second scan driver that provides second scan signals at a turn-on level that determines times for initializing anode voltages of the light emitting elements, wherein
each frame period includes an active period and a blank period,
the active period is a period from a time when the pixels receive an initial first scan signal at the turn-on level to a time when the pixels receive a last first scan signal of the turn-on level,
the blank period is a period from the time when the pixels receive the last first scan signal at the turn-on level to a time when the pixels receive an initial first scan signal of the turn-on level of a next frame period, and
a length of the blank period is larger than or equal to half a corresponding frame period.
9 . The display device of claim 8 , wherein
each of the frame periods includes, for each of the pixels, one address scan period and one self-scan period,
during the address scan period, each of the pixels receives a first scan signal at the turn-on level and a second scan signal at the turn-on level, and
during the self-scan period, each of the pixels does not receive a first scan signal at the turn-on level and receives a second scan signal at the turn-on level.
10 . The display device of claim 9 , wherein
a second scan signal at the turn-on level that pixels in a last pixel row among the pixels receive during the self-scan period does not overlap a first scan signal at the turn-on level that pixels in a first pixel row among the pixels receive during the address scan period.
11 . A display device comprising:
pixels including light emitting elements that emit light with luminance based on received data voltages;
a first scan driver that provides first scan signals at a turn-on level that determines times at which the pixels receive the data voltages; and
a second scan driver that provides second scan signals at a turn-on level that determines times for initializing anode voltages of the light emitting elements, wherein
each frame period includes, for each of the pixels, an address scan period and a self-scan period,
during the address scan period, each of the pixels receives a first scan signal at the turn-on level and a second scan signal at the turn-on level, and
during the self-scan period, each of the pixels does not receive a first scan signal at the turn-on level, and receives a second scan signal at the turn-on level,
during each of the frame periods, the self-scan period of a first pixel row starts before the address scan period of a last pixel row ends, and
during each of the frame periods, the second scan signals at the turn-on level supplied during the address scan periods of the pixels do not overlap the second scan signals at the turn-on level supplied during the self-scan periods of the pixels.
12 . The display device of claim 11 , wherein
during each of the frame periods, the second scan signals at the turn-on level supplied during the address scan periods of the pixels overlap each other in units of M adjacent pixel rows, and
M is an integer greater than 1.
13 . The display device of claim 12 , wherein
during each of the frame periods, the second scan signals at the turn-on level supplied during self-scan periods of the pixels overlap each other in units of the M adjacent pixel rows.
14 . The display device of claim 13 , wherein
a width of the second scan signals at the turn-on level is P horizontal periods,
the P is an integer greater than 0, and
the M is 2*P.
15 . The display device of claim 14 , wherein
the P is 4, and
the M is 8.
16 . The display device of claim 14 , wherein
the P is 3, and
the M is 6.
17 . The display device of claim 14 , wherein
the P is 2, and
the Mis 4.
18 . The display device of claim 11 , wherein
during each of the frame periods, each of the second scan signals at the turn-on level supplied during the address scan periods of the pixels includes Q pulses,
a first pulse among the Q pulses supplied to the first pixel row overlaps R pulses supplied to other pixel rows, and
each of Q and R is an integer greater than 0.
19 . The display device of claim 18 , wherein
a second pulse among the Q pulses supplied to the first pixel row overlaps S pulses supplied to other pixel rows, and
the Sis R+(R+1).
20 . The display device of claim 19 , wherein
a third pulse among the Q pulses supplied to the first pixel row overlaps T pulses supplied to other pixel rows, and
the Tis S+(R+1).